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The impact of technology parameters on the performance of common-Gate LNAs (2006)

Abstract
In this paper the impact of short channel effects on the performance of common-gate LNAs (CG-LNAs) is presented. It based on the modeling the MOSFET behavior including its intrinsic and extrinsic parasitics in all possible regions of operation. Characteristic performance figures of the used CMOS technology are defined and the bias dependent minimum input reflection coefficient and noise figure is determined. The paper shows furthermore the advantage of biasing the CG-LNA in the moderate inversion region.

Publication details
Repository Fraunhofer Publica (Germany)
Keywords common-gate LNA, technology limit, intrinsic and extrinsic parasitic
Type Conference Paper
Language english
Relation Napieralski, A.: International Conference Mixed Design of Integrated Circuits and Systems, MIXDES 2006. Proceedings: Gdynia, Poland, 22 - 24 June, 2006. Gdynia, 2006, pp. 538-543