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CMOS Silicon-on-Insulator technology: An alternative for NIR quantum efficiency enhanced CMOS imaging pixel detectors (2007)

Abstract
An experimental comparison between Time-Compression (TC) photogate pixel detectors fabricated in both, Silicon-on-Insulator (SOI) CMOS and 0.5µm standard CMOS processes, respectively, are presented to illustrate the convencience of using separated detection and readout regions integrated on a same CMOS imaging pixel.

Publication details
Repository Fraunhofer Publica (Germany)
Keywords Charge injection, time-compression amplification, SOI-Technologie, pixel array, CMOS-Technik
Type Conference Paper
Language english
Relation European Optical Society -EOS-: EOS Conference on Frontiers in Electronic Imaging 2007: Munich, Germany, from June 18 to 21, 2007. Hannover: EOS, 2007, pp. 26-27