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Time-of-flight 3-D imaging pixel structures in standard CMOS processes (2008)

Abstract
In this investigation we examine different pixel structures and readout principles to be used in imagers fabricated in standard CMOS processes, for example, the 0.5 mu m and 0.35 mu m processes available at the Fraunhofer IMS. The targeted applications are high-speed near-infra-red (NIR) 3-D imaging based on time-of-ftight (TOF) measurements. We discuss various issues ranging from charge-coupling possibilities to noise, spectral responsivity and fill-factor, and present an extensive study of pixel configurations based on inverse biased p-n junction and MOS-C based photodetectors. We also discuss the possibilities of using a novel CMOS imaging pixel for TOF imaging applications: the charge-injection photogate (CI-PG) which presents parametric time-compression amplification. Finally, we compare and discuss all the pixel configurations examined.

Publication details
Repository Fraunhofer Publica (Germany)
Keywords charge-coupling, charge-injection photogate, correlated-double-sampling (CDS), high-speed NIR imaging, photodiode based pixel, pixel noise, range finder, SNR, standard CMOS process, 3D imaging, time-compression amplification, time-of-flight
Type Journal Article
Language english
Relation IEEE journal of solid-state circuits, Vol.43 (2008), No.7, pp.1594-1602