| A Unified System and Circuit Approach to Portable Power IC Verification using Verilog-AMS (2008) | |||||||||||||
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| Abstract—The article describes how a Verilog-AMS based mixed-signal simulation methodology is used to unify the design verification on the system and circuit level. This methodology enabled the detection of design failures before tape out, even for a large mixed-signal system, and achieved first silicon success. Based on this experience with a switching battery charger design, a mixed-signal simulation flow is proposed that uses the same behavioral language and AMS simulation technology throughout the whole design process, starting from the system level, continuing on to block level and to final transistor level verification, without the need to re-enter the design data. The system-to-circuit flow allows the re-use of system level testbenches and behavioral models to speed up verification of the specification compliance of the finished design. An application specific Verilog-AMS behavioral library accelerates the system design and top-level verification. The simulation results for the system and circuit verification can be compared easily. The design flow combines top-down design with bottomup verification. The article explains how simulations on different levels of abstraction are used to keep simulation times manageable and at the same time allow detection of the most common design problems. The benefits of the unified functional environment for system and circuit design are a significantly improved quality of the silicon and a reduced design cycle time. Index Terms—Verilog-AMS, mixed-signal simulation, Power management IC | |||||||||||||
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