| Onboard FPGA-Based S AR Processing for Future Spacebome Systems (2009) | |||||||||||||
Abstract | |||||||||||||
| Abstruct- We present a real-time high-performance and fault-tolerant FPGA-based hardware architecture for the processing of synthetic aperture radar (SAR) images in future spaceborne system. In particular, we will discuss the integrated design approach, from top-level algorithm specifcations and system requirements, design methodology, functional verifcation and performance validation, down to hardware design and implementation. I. | |||||||||||||
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