| Monte-Carlo Algorithms for Layout Density Control (2007) | |||||||||||||||
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| Chemical-mechanical polishing (CMP) and other manufacturing steps in very deep submicron VLSI have varying effects on device and interconnect features, depending on local characteristics of the layout. To enhance manufacturability and performance predictability, we seek to make the layout uniform with respect to prescribed density criteria, by inserting "fill" geometries into the layout. We propose several new Monte-Carlo based filling methods with fast dynamic data structures and report the tradeoff between runtime and accuracy for the suggested methods. Compared to existing linear programming based approaches, our Monte-Carlo methods seem very promising as they produce nearly-optimal solutions within reasonable runtimes. I. Introduction As predicted by the International Technology Roadmap for Semiconductors (ITRS) [2], VLSI technology has entered deep submicron regimes, where the manufacturing process tends to have an increasingly constraining effect on physical layout design and v... | |||||||||||||||
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