| A Synchronous Approach for Hardware Design (1997) | |||||||||||||||||
Abstract | |||||||||||||||||
| : In this report we present a methodology for designing complex hardware systems. This methodology is based on the synchronous data flow language Signal which offers a formal framework to build executable specifications of hardware components. All design steps (i.e. refinements, verification, simulation, HDL generation, ...) are based on this unique formalism which allows to reduce product design cycle by decreasing communication problems between design phases. In this report we emphasis on the verification process and the HDL generation. The methodology can be applied to the dataflow synchronous common format DC + [19]. Key-words: Signal, synchronous data flow, HDL, hardware design, methodology (R'esum'e : tsvp) Centre National de la Recherche Scientifique Institut National de Recherche en Informatique (UPRESSA 6074) Universit e de Rennes 1 -- Insa de Rennes et en Automatique -- unit e de recherche de Rennes Une approche synchrone pour la conception de mat'eriel R'esum'e : Ce r... | |||||||||||||||||
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