Andreas Wieferink

Publication List Details

Period

2001 - 2008

Number

10

Co-Authors

ASIP Architecture Exploration for efficient IPSec Encryption: A Case Study (2008)

Hanno Scharwaechter, David Kammler, Andreas Wieferink, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, ...

Abstract. Application Specific Instruction Processors (ASIPs) are increasingly becoming popular in the world of customized, applicationdriven System-on-Chip (SoC) designs. Efficient ASIP design...

Abstract (2008)

Andreas Wieferink, Malte Doerper, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tim Kogel

Current and future SoC designs will contain an increasing number of heterogeneous programmable units combined with a complex communication architecture to meet flexibility, performance and cost...

ABSTRACT Retargetable Generation of TLM Bus Interfaces for MP-SoC Platforms (2008)

Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr

In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cores combined with a...

A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platforms (2004)

Andreas Wieferink, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr

Current and future SoC designs will contain an increasing number of heterogeneous programmable units combined with a complex communication architecture to meet flexibility, performance and cost...

Early iss integration into network-on-chip designs (2004)

Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr

Abstract. Future signal processing SoC designs will contain an increasing number of heterogeneous programmable units combined with a complex communication architecture to meet flexibility,...

Processor/memory co-exploration on multiple abstraction levels (2003)

Gunnar Braun, Andreas Wieferink, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr

Recently, the evolution of embedded systems has shown a strong trend towards application-specific, single-chip solutions. As a result, application-specific instruction set processors (ASIP) are more...

A Modular Simulation Framework for Architectural Exploration of On-Chip Interconnection Networks (2003)

Tim Kogel, Malte Doerper, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr

Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prevent time consuming...

Virtual Architecture Mapping: A SystemC based Methodology for Architectural Exploration of System-on-Chip Designs (2003)

Tim Kogel, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr

Abstract — The ever increasing complexity and heterogeneity of modern System-on-Chip designs demands early consideration and exploration of architectural alternatives, which is hardly practicable...

A Generic Tool-Set for SoC Multiprocessor Debugging and Synchronization (2003)

Andreas Wieferink, Tim Kogel, Rainer Leupers, Heinrich Meyr, Achim Nohl, Andreas Hoffmann

Current and future SoC designs will contain an increasing number of programmable units. To be able to tailor and debug these processors in their system context at the highest possible overall...

A Novel Methodology for the Design of Application-Specific Instruction-Set Processors (ASIPs) Using a Machine Description Language (2001)

Andreas Hoffmann, Tim Kogel, Achim Nohl, Gunnar Braun, Oliver Schliebusch, ...

The development of application-specific instruction -set processors (ASIP) is currently the exclusive domain of the semiconductor houses and core vendors. This is due to the fact that building such...