Abstract Adaptive Cache Decay using Formal Feedback Control (2008)
Sivakumar Velusamy, Karthik Sankaranarayanan, Dharmesh Parikh, Tarek Abdelzaher, Kevin Skadron
This paper argues that adaptive techniques in processor architecture should be designed using formal feedback-control theory. We use the derivation of a controller for cache decay—a technique for...
Abstract Adaptive Cache Decay using Formal Feedback Control (2007)
Sivakumar Velusamy, Karthik Sankaranarayanan, Dharmesh Parikh, Tarek Abdelzaher, Kevin Skadron
This paper argues that adaptive techniques in processor architecture should be designed using formal feedback-control theory. We use the derivation of a controller for cache decay—a technique for...
Power Issues Related to Branch Prediction — University Of Virginia Tech.Report CS-2001-25 — (2007)
Dharmesh Parikh, Kevin Skadron, Yan Zhang, Marco Barcella, Mircea R. Stan
dharmesh,skadron¤ This paper explores the role of branch predictor organization in power/energy/performance tradeoffs for processor design. We find that as a general rule, to reduce overall energy...
Power-Aware Branch Prediction: Characterization and Design (2004)
Dharmesh Parikh, Kevin Skadron, Yan Zhang, Mircea Stan
This paper uses Wattch and the SPEC 2000 integer and floating-point benchmarks to explore the role of branch predictor organization in power/energy/performance tradeoffs for processor design. Even...
State-Preserving vs. Non-State-Preserving Leakage Control in Caches (2004)
Dharmesh Parikh, Yan Zhang, Karthik Sankaranarayanan, Kevin Skadron, Mircea Stan
This paper compares the effectiveness of statepreserving and non-state-preserving techniques for leakage control in caches by comparing drowsy cache and gated-V¦§ ¦ for data caches using 70nm...
Power-Aware Branch Prediction: Characterization and Design (2004)
Dharmesh Parikh, Kevin Skadron, Yan Zhang, Student Member, Mircea Stan, Senior Member
Abstract—This paper uses Wattch and the SPEC 2000 integer and floating-point benchmarks to explore the role of branch predictor organization in power/energy/performance trade offs for processor...
State-Preserving vs. Non-State-Preserving Leakage Control in Caches (2004)
Yingmin Li, Dharmesh Parikh, Yan Zhang, Karthik Sankaranarayanan, Mircea Stan
yingmin,dharmesh,karthick,skadron¥ This paper compares the effectiveness of statepreserving and non-state-preserving techniques for leakage control in caches by comparing drowsy cache and gated-V ¦...
State-Preserving vs. Non-State-Preserving Leakage Control in Caches (2004)
Yingmin Li, Dharmesh Parikh, Yan Zhang, Karthik Sankaranarayanan, Mircea Stan, Kevin Skadron
yingmin,dharmesh,karthick,skadron¥ This paper compares the effectiveness of statepreserving and non-state-preserving techniques for leakage control in caches by comparing drowsy cache and...
State-Preserving vs. Non-State-Preserving Leakage Control in Caches (2004)
Dharmesh Parikh, Yan Zhang, Karthik Sankaranarayanan, Kevin Skadron, Mircea Stan
This paper compares the effectiveness of state-preserving and non-state-preserving techniques for leakage control in caches by comparing drowsy cache and gated-V§¨ § for data caches using 70nm...
HotLeakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects (2003)
Yan Zhang, Dharmesh Parikh, Karthik Sankaranarayanan, Kevin Skadron, Mircea Stan
This report introduces HotLeakage, an architectural model for subthreshold and gate leakage that we have developed here at the University of Virginia. The most important features of HotLeakage are...
HotLeakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects (2003)
Yan Zhang, Dharmesh Parikh, Karthik Sankaranarayanan, Kevin Skadron, Mircea Stan
This report introduces HotLeakage, an architectural model for subthreshold and gate leakage that we have developed here at the University of Virginia. The most important features of HotLeakage are...
Hotleakage: A temperature-aware model of subthreshold and gate leakage for architects (2003)
Yan Zhang, Dharmesh Parikh, Karthik Sankaranarayanan, Kevin Skadron, Mircea Stan
This report introduces HotLeakage, an architectural model for subthreshold and gate leakage that we have developed here at the University of Virginia. The most important features of HotLeakage are...
Cache-Conscious Allocation of Pointer-Based Data Structures Revisited with (2002)
Josefin Hallberg, Tuva Palm, Mats Brorsson, Dharmesh Parikh, Yan Zhang, ...
As memory access times continue to be a bottleneck, differential research is required for better understanding of memory access performance. Studies of cache-conscious allocation and software...
Adaptive cache decay using formal feedback control (2002)
Sivakumar Velusamy, Karthik Sankaranarayanan, Dharmesh Parikh, Tarek Abdelzaher, Kevin Skadron
This paper argues that adaptive techniques in processor architecture should be designed using formal feedback-control theory. We use the derivation of a controller for cache decay---a technique for...
Power Issues Related to Branch Prediction (2002)
Dharmesh Parikh, Kevin Skadron, Yan Zhang, Marco Barcella, Mircea R. Stan
dharmesh,skadron£ This paper explores the role of branch predictor organization in power/energy/performance tradeoffs for processor design. We find that as a general rule, to reduce overall energy...