Large multipliers with less DSP blocks (2009)
De Dinechin, Florent, Pasca, Bogdan
Recent computing-oriented FPGAs feature DSP blocks including small embedded multipliers. A large integer multiplier, for instance for a double-precision floating-point multiplier, consumes many of...
Large multipliers with less DSP blocks (2009)
De Dinechin, Florent, Pasca, Bogdan
Recent computing-oriented FPGAs feature DSP blocks including small embedded multipliers. A large integer multiplier, for instance for a double-precision floating-point multiplier, consumes many of...
Generating high-performance custom floating-point pipelines (2009)
De Dinechin, Florent, Klein, Cristian, Pasca, Bogdan
Custom operators, working at custom precisions, are a key ingredient to fully exploit the FPGA flexibility advantage for high-performance computing. Unfortunately, such operators are costly to...
Generating high-performance custom floating-point pipelines (2009)
De Dinechin, Florent, Klein, Cristian, Pasca, Bogdan
Custom operators, working at custom precisions, are a key ingredient to fully exploit the FPGA flexibility advantage for high-performance computing. Unfortunately, such operators are costly to...
Racines carrées multiplicatives sur FPGA (2009)
De Dinechin, Florent, Joldes, Mioara, Pasca, Bogdan, Revy, Guillaume
Les implantations actuelles de la racine carrée dans des bibliothèques d'opérateurs pour FPGA utilisent presque toutes une récurrence à base d'additions. Ce choix est particulièrement bien...
Racines carrées multiplicatives sur FPGA (2009)
De Dinechin, Florent, Joldes, Mioara, Pasca, Bogdan, Revy, Guillaume
Les implantations actuelles de la racine carrée dans des bibliothèques d'opérateurs pour FPGA utilisent presque toutes une récurrence à base d'additions. Ce choix est particulièrement bien...
An FPGA-specific Approach to Floating-Point Accumulation and Sum-of-Products (2008)
De Dinechin, Florent, Pasca, Bogdan, Tudoran, Radu
Floating-point operators on FPGAs do not have to be identical to the ones available in processors. This article studies two common situations where the flexibility of FPGAs allows one to design...
An FPGA-specific Approach to Floating-Point Accumulation and Sum-of-Products (2008)
De Dinechin, Florent, Pasca, Bogdan, Tudoran, Radu
Floating-point operators on FPGAs do not have to be identical to the ones available in processors. This article studies two common situations where the flexibility of FPGAs allows one to design...
Ce mémoire reprend quelques résultats obtenus entre 2000 et 2007 au sein du projet Arénaire du LIP. La problématique centrale est l'évaluation de fonctions numériques : étant donnée une...
An FPGA-specific Approach to Floating-Point Accumulation and Sum-of-Products (2008)
De Dinechin, Florent, Pasca, Bogdan, Tudoran, Radu
Floating-point operators on FPGAs do not have to be identical to the ones available in processors. This article studies two common situations where the flexibility of FPGAs allows one to design...
An FPGA-specific Approach to Floating-Point Accumulation and Sum-of-Products (2008)
De Dinechin, Florent, Pasca, Bogdan, Tudoran, Radu
Floating-point operators on FPGAs do not have to be identical to the ones available in processors. This article studies two common situations where the flexibility of FPGAs allows one to design...
Optimizing polynomials for floating-point implementation (2008)
De Dinechin, Florent, Lauter, Christoph Quirin
The floating-point implementation of a function on an interval often reduces to polynomial approximation, the polynomial being typically provided by Remez algorithm. However, the floating-point...
Certifying floating-point implementations using Gappa (2008)
De Dinechin, Florent, Lauter, Christoph Quirin, Melquiond, Guillaume
High confidence in floating-point programs requires proving numerical properties of final and intermediate values. One may need to guarantee that a value stays within some range, or that the error...
Optimizing polynomials for floating-point implementation (2008)
De Dinechin, Florent, Lauter, Christoph
The floating-point implementation of a function on an interval often reduces to polynomial approximation, the polynomial being typically provided by Remez algorithm. However, the floating-point...
Optimizing polynomials for floating-point implementation (2008)
De Dinechin, Florent, Lauter, Christoph
The floating-point implementation of a function on an interval often reduces to polynomial approximation, the polynomial being typically provided by Remez algorithm. However, the floating-point...
Integer and Floating-Point Constant Multipliers for FPGAs (2008)
Brisebarre, Nicolas, De Dinechin, Florent, Muller, Jean-Michel
Reconfigurable circuits now have a capacity that allows them to be used as floating-point accelerators. They offer massive parallelism, but also the opportunity to design optimised floating-point...
Integer and Floating-Point Constant Multipliers for FPGAs (2008)
Brisebarre, Nicolas, De Dinechin, Florent, Muller, Jean-Michel
Reconfigurable circuits now have a capacity that allows them to be used as floating-point accelerators. They offer massive parallelism, but also the opportunity to design optimised floating-point...
Generating high-performance arithmetic operators for FPGAs (2008)
De Dinechin, Florent, Klein, Cristian, Pasca, Bogdan
This article addresses the development of complex, heavily parameterized and flexible operators to be used in FPGA-based floating-point accelerators. Languages such as VHDL or Verilog are not ideally...
An FPGA-specific Approach to Floating-Point Accumulation and Sum-of-Products (2008)
De Dinechin, Florent, Pasca, Bogdan, Tudoran, Radu
Floating-point operators on FPGAs do not have to be identical to the ones available in processors. This article studies two common situations where the flexibility of FPGAs allows one to design...
Generating high-performance arithmetic operators for FPGAs (2008)
De Dinechin, Florent, Klein, Cristian, Pasca, Bogdan
This article addresses the development of complex, heavily parameterized and flexible operators to be used in FPGA-based floating-point accelerators. Languages such as VHDL or Verilog are not ideally...
An FPGA-specific Approach to Floating-Point Accumulation and Sum-of-Products (2008)
De Dinechin, Florent, Pasca, Bogdan, Tudoran, Radu
Floating-point operators on FPGAs do not have to be identical to the ones available in processors. This article studies two common situations where the flexibility of FPGAs allows one to design...
Fonctions élémentaires en virgule flottante pour les accélérateurs reconfigurables (2008)
Detrey, Jérémie, De Dinechin, Florent
Les circuits reconfigurables FPGA ont désormais une capacité telle qu'ils peuvent être utilisés à des tâches d'accélération de calcul en virgule flottante. La littérature (et depuis peu les...
Fonctions élémentaires en virgule flottante pour les accélérateurs reconfigurables (2008)
Detrey, Jérémie, De Dinechin, Florent
Les circuits reconfigurables FPGA ont désormais une capacité telle qu'ils peuvent être utilisés à des tâches d'accélération de calcul en virgule flottante. La littérature (et depuis peu les...
Fast and correctly rounded logarithms in double precision (2007)
Muller, Jean-Michel, De Dinechin, Florent, Lauter, Christoph
This article is a case study in the implementation of a portable, proven and efficient correctly rounded elementary function in double-precision. We describe the methodology used to achieve these...
Tudoran, Radu, De Dinechin, Florent
In the last years the interest for magnetic stimulation of the human nervous tissue has increased considerably, because this technique has proved its utility and applicability both as a diagnostic...
When FPGAs are better at floating-point than microprocessors (2007)
De Dinechin, Florent, Detrey, Jérémie, Tudoran, Radu
It has been shown that FPGAs could outperform high-end microprocessors on floating-point computations thanks to massive parallelism. However, most previous studies re-implement in the FPGA the...
Certifying floating-point implementations using Gappa (2007)
De Dinechin, Florent, Lauter, Christoph, Melquiond, Guillaume
High confidence in floating-point programs requires proving numerical properties of final and intermediate values. One may need to guarantee that a value stays within some range, or that the error...
Certifying floating-point implementations using Gappa (2007)
De Dinechin, Florent, Lauter, Christoph, Melquiond, Guillaume
High confidence in floating-point programs requires proving numerical properties of final and intermediate values. One may need to guarantee that a value stays within some range, or that the error...
When FPGAs are better at floating-point than microprocessors (2007)
De Dinechin, Florent, Detrey, Jérémie, Tudoran, Radu
It has been shown that FPGAs could outperform high-end microprocessors on floating-point computations thanks to massive parallelism. However, most previous studies re-implement in the FPGA the...
Tudoran, Radu, De Dinechin, Florent
In the last years the interest for magnetic stimulation of the human nervous tissue has increased considerably, because this technique has proved its utility and applicability both as a diagnostic...
Fast and correctly rounded logarithms in double precision (2007)
Muller, Jean-Michel, De Dinechin, Florent, Lauter, Christoph
This article is a case study in the implementation of a portable, proven and efficient correctly rounded elementary function in double-precision. We describe the methodology used to achieve these...
Ce mémoire reprend quelques résultats obtenus entre 2000 et 2007 au sein du projet Arénaire du LIP. La problématique centrale est l'évaluation de fonctions numériques : étant donnée une...
Ce mémoire reprend quelques résultats obtenus entre 2000 et 2007 au sein du projet Arénaire du LIP. La problématique centrale est l'évaluation de fonctions numériques : étant donnée une...
Ce mémoire reprend quelques résultats obtenus entre 2000 et 2007 au sein du projet Arénaire du LIP. La problématique centrale est l'évaluation de fonctions numériques : étant donnée une...
Parameterized floating-point logarithm and exponential functions for FPGAs (2006)
Detrey, Jérémie, De Dinechin, Florent
15 pages, figures, graphiques, 19 références bibliographiques
Return of the hardware floating-point elementary function (2006)
Detrey, Jérémie, De Dinechin, Florent, Pujol, Xavier
The study of specific hardware circuits for the evaluation of floating-point elementary functions was once an an active research area, until it was realized that these functions were not frequent...
Return of the hardware floating-point elementary function (2006)
Detrey, Jérémie, De Dinechin, Florent, Pujol, Xavier
The study of specific hardware circuits for the evaluation of floating-point elementary functions was once an an active research area, until it was realized that these functions were not frequent...
Fast and correctly rounded logarithms in double-precision (2005)
De Dinechin, Florent, Lauter, Christoph, Muller, Jean-Michel
This article is a case study in the implementation of a portable, proven and efficient correctly rounded elementary function in double-precision. We describe the methodology used to achieve these...
Assisted verification of elementary functions (2005)
De Dinechin, Florent, Lauter, Christoph, Melquiond, Guillaume
The implementation of a correctly rounded or interval elementary function needs to be proven carefully in the very last details. The proof requires a tight bound on the overall error of the...
Fast and correctly rounded logarithms in double-precision (2005)
De Dinechin, Florent, Lauter, Christoph, Muller, Jean-Michel
16 p., tableaux, 31 références bibliographiques
Fast and correctly rounded logarithms in double-precision (2005)
De Dinechin, Florent, Lauter, Christoph, Muller, Jean-Michel
This article is a case study in the implementation of a portable, proven and efficient correctly rounded elementary function in double-precision. We describe the methodology used to achieve these...
Assisted verification of elementary functions (2005)
De Dinechin, Florent, Lauter, Christoph, Melquiond, Guillaume
The implementation of a correctly rounded or interval elementary function needs to be proven carefully in the very last details. The proof requires a tight bound on the overall error of the...
Fast and correctly rounded logarithms in double-precision (2005)
De Dinechin, Florent, Lauter, Christoph, Muller, Jean-Michel
This article is a case study in the implementation of a portable, proven and efficient correctly rounded elementary function in double-precision. We describe the methodology used to achieve these...
Assisted verification of elementary functions (2005)
De Dinechin, Florent, Lauter, Christoph, Melquiond, Guillaume
The implementation of a correctly rounded or interval elementary function needs to be proven carefully in the very last details. The proof requires a tight bound on the overall error of the...
Towards the post-ultimate libm. (2004)
De Dinechin, Florent, Gast, Nicolas
(eng) This article presents advances in the subject of double-precision correctly rounded elementary functions since the publication of the libultim mathematical library developed by Ziv at IBM. This...
Table-based polynomials for fast hardware function evaluation. (2004)
Detrey, Jérémie, De Dinechin, Florent
(eng) Many general table-based methods for the evaluation in hardware of elementary functions have been published. The bipartite and multipartite methods implement a first-order approximation of the...
De Dinechin, Florent, Defour, David, Lauter, Christophe
(eng) This article shows that IEEE-754 double-precision correct rounding of the most common elementary functions (exp/log, trigonometric and hyperbolic) is achievable on current processors using only...
Second Order Function Approximation with a Single Small Multiplication. (2004)
Detrey, Jérémie, De Dinechin, Florent
(eng) This paper presents a new scheme for the hardware evaluation of elementary functions, based on a piecewise second order minimax approximation. The novelty is that this evaluation requires only...
Towards the post-ultimate libm (2004)
De Dinechin, Florent, Gast, Nicolas
This article presents advances in the subject of double-precision correctly rounded elementary functions since the publication of the libultim mathematical library developed by Ziv at IBM. This...
De Dinechin, Florent, Defour, David, Lauter, Christoph
This article shows that IEEE-754 double-precision correct rounding of the most common elementary functions (exp/log, trigonometric and hyperbolic) is achievable on current processors using only...
Second Order Function Approximation with a Single Small Multiplication (2004)
Detrey, Jérémie, De Dinechin, Florent
This paper presents a new scheme for the hardware evaluation of elementary functions, based on a piecewise second order minimax approximation. The novelty is that this evaluation requires only one...
Towards the post-ultimate libm (2004)
De Dinechin, Florent, Gast, Nicolas
This article presents advances in the subject of double-precision correctly rounded elementary functions since the publication of the libultim mathematical library developed by Ziv at IBM. This...
De Dinechin, Florent, Defour, David, Lauter, Christoph
This article shows that IEEE-754 double-precision correct rounding of the most common elementary functions (exp/log, trigonometric and hyperbolic) is achievable on current processors using only...
Second Order Function Approximation with a Single Small Multiplication (2004)
Detrey, Jérémie, De Dinechin, Florent
This paper presents a new scheme for the hardware evaluation of elementary functions, based on a piecewise second order minimax approximation. The novelty is that this evaluation requires only one...
CR-LIBM: The evaluation of the exponential. (2003)
Daramy, C., Defour, David, De Dinechin, Florent, Muller, Jean-Michel
(eng) We present a new elementary function library, called CR-LIBM. This library implements the various functions defined by the Ansi99 C standard. It provides correctly rounded functions. When...
A new scheme for table-based evaluation of functions. (2002)
Defour, David, De Dinechin, Florent, Muller, Jean-Michel
(eng) This paper presents a new scheme for the hardware evaluation of functions in fixed-point format, for precisions up to 30 bits. This scheme yields an architecture made of four look-up tables, a...
Software Carry-Save for Fast Multiple-Precision Algorithms. (2002)
Defour, David, De Dinechin, Florent
(eng) This paper introduces a new machine representations of multiple-precision (MP) numbers, geared toward simple and fast implementations. We observe, in the usual high-radix representations, that...
A new scheme for table-based evaluation of functions (2002)
Defour, David, De Dinechin, Florent, Muller, Jean-Michel
This paper presents a new scheme for the hardware evaluation of functions in fixed-point format, for precisions up to 30 bits. This scheme yields an architecture made of four look-up tables, a...
A new scheme for table-based evaluation of functions (2002)
Defour, David, De Dinechin, Florent, Muller, Jean-Michel
This paper presents a new scheme for the hardware evaluation of functions in fixed-point format, for precisions up to 30 bits. This scheme yields an architecture made of four look-up tables, a...
Multipartite Tables in JBits for the Evaluation of Functions on FPGA. (2001)
Detrey, Jérémie, De Dinechin, Florent
(eng) This paper presents a core generator for arbitrary numeric functions on Xilinx Virtex FPGAs. The cores use the state-of-the-art multipartite table method, which allows input and output...
Multipartite Tables in JBits for the Evaluation of Functions on FPGA (2001)
Detrey, Jérémie, De Dinechin, Florent
This paper presents a core generator for arbitrary numeric functions on Xilinx Virtex FPGAs. The cores use the state-of-the-art multipartite table method, which allows input and output precisions in...
Correctly Rounded Exponential Function in Double Precision Arithmetic (2001)
Defour, David, De Dinechin, Florent, Muller, Jean-Michel
We present an algorithm for implementing correctly rounded exponentials in double-precision floating point arithmetic. This algorithm is based on floating-point operations in the widespread IEEE-754...
Multipartite Tables in JBits for the Evaluation of Functions on FPGA (2001)
Detrey, Jérémie, De Dinechin, Florent
This paper presents a core generator for arbitrary numeric functions on Xilinx Virtex FPGAs. The cores use the state-of-the-art multipartite table method, which allows input and output precisions in...
Correctly Rounded Exponential Function in Double Precision Arithmetic (2001)
Defour, David, De Dinechin, Florent, Muller, Jean-Michel
We present an algorithm for implementing correctly rounded exponentials in double-precision floating point arithmetic. This algorithm is based on floating-point operations in the widespread IEEE-754...
Some Improvements on Multipartite Table Methods (2000)
De Dinechin, Florent, Tisserand, Arnaud
This paper presents an unified view of most previous table-lookup-and-addition methods: bipartite tables, SBTM, STAM and multipartite method. This new definition allows a more accurate computation of...
Some Improvements on Multipartite Table Methods (2000)
De Dinechin, Florent, Tisserand, Arnaud
This paper presents an unified view of most previous table-lookup-and-addition methods: bipartite tables, SBTM, STAM and multipartite method. This new definition allows a more accurate computation of...
Towards Portable Hierarchical Placement for FPGAs. (1999)
De Dinechin, Florent, Luk, Wayne, McKeever, Steve
(eng) Field Programmable Gate Arrays (FPGAs) are usually programmed using languages and methods inherited from the domain of VLSI synthesis. These methods, however, have not always been adapted to...
Towards Portable Hierarchical Placement for FPGAs (1999)
De Dinechin, Florent, Luk, Wayne, Mckeever, Steve
Field Programmable Gate Arrays (FPGAs) are usually programmed using languages and methods inherited from the domain of VLSI synthesis. These methods, however, have not always been adapted to the new...
The Price of Routing in FPGAs (1999)
Among integrated circuits, field programmable gate arrays (FPGAs) may be the most spectacular benefactors of the steady progress of very large scale integration (VLSI) technology in the last two...
Towards Portable Hierarchical Placement for FPGAs (1999)
De Dinechin, Florent, Luk, Wayne, Mckeever, Steve
Field Programmable Gate Arrays (FPGAs) are usually programmed using languages and methods inherited from the domain of VLSI synthesis. These methods, however, have not always been adapted to the new...
The Price of Routing in FPGAs (1999)
Among integrated circuits, field programmable gate arrays (FPGAs) may be the most spectacular benefactors of the steady progress of very large scale integration (VLSI) technology in the last two...
Structured Scheduling of Recurrence Equations (1997)
Risset, Tanguy, De Dinechin, Florent, Robert, Sophie
We study scheduling of structured systems of recurrence equations. We first recall the formalism of structured systems of recurrence equations, then we explain how to implement a scheduling tool for...
Structured Scheduling of Recurrence Equations (1997)
Risset, Tanguy, De Dinechin, Florent, Robert, Sophie
We study scheduling of structured systems of recurrence equations. We first recall the formalism of structured systems of recurrence equations, then we explain how to implement a scheduling tool for...