Diastolic Arrays: Throughput-Driven Reconfigurable Computing (2009)
Myong Hyon Cho, Chih-chi Cheng, Michel Kinsy, G. Edward Suh, Srinivas Devadas
Abstract — Diastolic arrays are arrays of processing elements that communicate exclusively through First-In First-Out (FIFO) queues. FIFO virtualization units enable relaxed timing of data...
Design and Test of ICs for Secure Embedded Computing (2008)
An often-used security model for trusted embedded-systems design is to trust the on-chip environment while not trusting the off-chip environment. The authors discuss the Aegis secure, single-chip...
Analytical Cache Models with Applicationsto Cache Partitioning (2008)
G. Edward Suh, Srinivas Devadas, Larry Rudolphlaboratory, Computer Science
ABSTRACT Secure Program Execution via Dynamic Information Flow Tracking (2008)
G. Edward Suh, Jae W. Lee, David Zhang, Srinivas Devadas
We present a simple architectural mechanism called dynamic information flow tracking that can significantly improve the security of computing systems with negligible performance overhead. Dynamic...
AEGIS – Tamper Evident and Tamper Resistant Processing (2008)
G. Edward Suh, Dwaine Clarke, Marten Van Dijk, Srinivas Devadas, Tal Garfinkel, Ben Pfaff, ...
Trusted computing means that the computer will consistently behave in specific ways, and those behaviors will be enforced by hardware and software. Enlightened after reading the papers: Trusted...
Physical Unclonable Functions (PUFs) are innovative circuit primitives that extract secrets from physical characteristics of integrated circuits (ICs). We present PUF designs that exploit inherent...
Physical Unclonable Functions (PUFs) are innovative circuit primitives that extract secrets from physical characteristics of integrated circuits (ICs). We present PUF designs that exploit inherent...
Daihyun Lim, Jae W. Lee, Blaise Gassend, G. Edward Suh, Marten Van Dijk, Srinivas Devadas
Abstract—Modern cryptographic protocols are based on the premise that only authorized participants can obtain secret keys and access to information systems. However, various kinds of tampering...
ABSTRACT Secure Program Execution via Dynamic Information Flow Tracking (2008)
G. Edward Suh, Jae W. Lee, David Zhang, Srinivas Devadas
We present a simple architectural mechanism called dynamic information flow tracking that can significantly improve the security of computing systems with negligible performance overhead. Dynamic...
Offline Authentication of Untrusted Storage (2007)
Dwaine Clarke, Blaise Gassend, G. Edward Suh, Marten Van Dijk, Srinivas Devadas
We extend the offline memory correctness checking scheme presented by Blum et. al [BEG + 91], by using incremental cryptography, to detect attacks by an active adversary. We also introduce a hybrid...
Efficient MemoryIntegrityVerification and Encryption forSecure Processors (2007)
G. Edward Suh, Dwaine Clarke, Martenvan Dijk
Secure processors enable new sets of applications such as commercial grid computing, software copy-protection, and secure mobile agents by providing security from both physical and software attacks....
AEGIS: A Single-Chip Secure Processor (2005)
G. Edward Suh, Charles W. O’donnell, Srinivas Devadas
Abstract This article presents the AEGIS secure processor architecture, which enables new applications by ensuring private and authentic program execution even in the face of physical attack. Our...
G. Edward Suh, Charles W. O’donnell, Ishan Sachdev, Srinivas Devadas
Secure processors enable new applications by ensuring private and authentic program execution even in the face of physical attack. In this paper we present the AEGIS secure processor architecture,...
Towards constant bandwidth overhead integrity checking of untrusted data (2005)
Dwaine Clarke, G. Edward Suh, Blaise Gassend, Ajay Sudan, Marten Van Dijk, Srinivas Devadas
We present an adaptive tree-log scheme to improve the performance of checking the integrity of arbitrarily-large untrusted data, when using only a small fixed-sized trusted state. Currently, hash...
G. Edward Suh, Charles W. O’donnell, Ishan Sachdev, Srinivas Devadas
Secure processors enable new applications by ensuring private and authentic program execution even in the face of physical attack. In this paper we present the AEGIS secure processor architecture,...
G. Edward Suh, Charles W. O’donnell, Ishan Sachdev, Srinivas Devadas
Secure processors enable new applications by ensuring private and authentic program execution even in the face of physical attack. In this paper we present the AEGIS secure processor architecture,...
Towards constant bandwidth overhead integrity checking of untrusted data (2005)
Dwaine Clarke, G. Edward Suh, Blaise Gassend, Ajay Sudan, Marten Van Dijk, Srinivas Devadas
We present an adaptive tree-log scheme to improve the performance of checking the integrity of arbitrarily-large untrusted data, when using only a small fixed-sized trusted state. Currently, hash...
Thesis Topic: “Analytical Cache Models with Applications to Cache Partitioning” (2005)
G. Edward Suh, Advisor Srinivas Devadas, Minor Signal Processing, Advisor Srinivas Devadas, Larry Rudolph
AEGIS Secure Processor: My dissertation research investigates a new processor architecture that enables secure computing under potentially malicious operating systems and physical attacks. The...
Jae W. Lee, Daihyun Lim, Blaise Gassend, G. Edward Suh, Marten Van Dijk, Srini Devadas
This paper describes a technique that exploits the statistical delay variations of wires and transistors across ICs to build a secret key unique to each IC. To explore its feasibility, we fabricated...
Secure Program Execution via Dynamic Information Flow Tracking (2004)
G. Edward Suh, Jaewook Lee, Srinivas Devadas
Dynamic information flow tracking is a hardware mechanism to protect programs against malicious attacks by identifying spurious information flows and restricting the usage of spurious information....
Jae W. Lee, Daihyun Lim, Blaise Gassend, G. Edward Suh, Marten Van Dijk, Srinivas Devadas
This paper describes a technique that exploits the statistical delay variations of wires and transistors across ICs to build a secret key unique to each IC. To explore its feasibility, we fabricated...
PUF-based random number generation (2004)
Charles W. O’donnell, G. Edward Suh, Srinivas Devadas
From security to randomized algorithms, there are many existing problems whose solutions are fundamentally based on the assumption that intrinsically pure random number sources exist. Pseudorandom...
Secure Program Execution Via Dynamic Information Flow Tracking (2003)
Suh, G. Edward, Lee, Jaewook, Zhang, David, Devadas, Srinivas
We present a simple architectural mechanism called dynamicinformation flow tracking that can significantly improve thesecurity of computing systems with negligible performanceoverhead. Dynamic...
Secure Program Execution Via Dynamic Information Flow Tracking (2003)
Suh, G. Edward, Lee, Jaewook, Zhang, David, Devadas, Srinivas
We present a simple architectural mechanism called dynamicinformation flow tracking that can significantly improve thesecurity of computing systems with negligible performanceoverhead. Dynamic...
Incremental multiset hash functions and their application to memory integrity checking (2003)
Dwaine Clarke, Srinivas Devadas, Marten Van Dijk, Blaise Gassend, G. Edward Suh
Abstract. We introduce a new cryptographic tool: multiset hash functions. Unlike standard hash functions which take strings as input, multiset hash functions operate on multisets (or sets). They map...
The AEGIS processor architecture for tamperevident and tamper resistant processing (2003)
Edward Suh, Dwaine Clarke, Blaise Gassend, Marten Van Dijk, Srini Devadas, G. Edward Suh, ...
We describe the architecture of the aegis processor which can be used to build computing systems secure against both physical and software attacks. aegis assumes that the operating system and all...
Caches and Hash Trees for Efficient Memory Integrity Verification (2003)
Blaise Gassend, G. Edward Suh, Dwaine Clarke, Marten Van Dijk, Srinivas Devadas
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications such as certified...
Incremental multiset hash functions and their application to memory integrity checking (2003)
Dwaine Clarke, Srinivas Devadas, Marten Van Dijk, Blaise Gassend, G. Edward Suh
Abstract. We introduce a new cryptographic tool: multiset hash functions. Unlike standard hash functions which take strings as input, multiset hash functions operate on multisets (or sets). They map...
Efficient Memory Integrity Verification and Encryption for Secure Processors (2003)
G. Edward Suh, Dwaine Clarke, Blaise Gassend, Marten Van Dijk, Srinivas Devadas
Secure processors enable new sets of applications such as commercial grid computing, software copy-protection, and secure mobile agents by providing security from both physical and software attacks....
Caches and Hash Trees for Efficient Memory Integrity Verification (2003)
Blaise Gassend, G. Edward Suh, Dwaine Clarke, Marten Van Dijk, Srinivas Devadas
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications such as certified...
Aegis: architecture for tamper-evident and tamper-resistant processing (2003)
G. Edward Suh, Dwaine Clarke, Blaise Gassend, Marten Van Dijk, Srinivas Devadas
{suh,declarke,gassend,marten,devadas} @ mit.edu We describe the architecture for a single-chip AEGIS processor which can be used to build computing systems secure against both physical and software...
Incremental multiset hash functions and their application to memory integrity checking (2003)
Dwaine Clarke, Srinivas Devadas, Marten Van Dijk, Blaise Gassend, G. Edward Suh
Abstract. We introduce a new cryptographic tool: multiset hash functions. Unlike standard hash functions which take strings as input, multiset hash functions operate on multisets (or sets). They map...
Aegis: architecture for tamper-evident and tamper-resistant processing (2003)
G. Edward Suh, Dwaine Clarke, Blaise Gassend, Marten Van Dijk, Srinivas Devadas
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture assumes that all...
Efficient Memory Integrity Verification and Encryption for Secure Processors (2003)
G. Edward Suh, Dwaine Clarke, Blaise Gassend, Marten Van Dijk, Srinivas Devadas
Secure processors enable new sets of applications such as commercial grid computing, software copy-protection, and secure mobile agents by providing security from both physical and software attacks....
The AEGIS Processor Architecture for Tamper-Evident and Tamper-Resistant Processing (2003)
G. Edward Suh, Dwaine Clarke, Blaise Gassend, Marten Van Dijk, Srinivas Devadas
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture assumes that all...
Incremental Multiset Hash Functions and their Application to Memory Integrity Checking (2003)
Dwaine Clarke, Srinivas Devadas, Marten Van Dijk, Blaise Gassend, G. Edward Suh
We introduce a new cryptographic tool: multiset hash functions. Unlike standard hash functions which take strings as input, multiset hash functions operate on multisets (or sets). They map multisets...
Aegis: architecture for tamper-evident and tamper-resistant processing (2003)
G. Edward Suh, Dwaine Clarke, Blaise Gassend, Marten Van Dijk, Srinivas Devadas
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture assumes that all...
ABSTRACT Secure Program Execution via Dynamic Information Flow Tracking (2003)
Edward Suh, Jaewook Lee, Srini Devadas, David Zhang, G. Edward Suh, Jae W. Lee, ...
We present a simple architectural mechanism called dynamic information flow tracking that can significantly improve the security of computing systems with negligible performance overhead. Dynamic...
Aegis: architecture for tamper-evident and tamper-resistant processing (2003)
G. Edward Suh, G. Edward Suh, Dwaine Clarke, Dwaine Clarke, Blaise Gassend, Blaise Gassend, ...
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture assumes that all...
Efficient Memory Integrity Verification and Encryption for Secure Processors (2003)
Srini Devadas, G. Edward Suh, G. Edward Suh, Dwaine Clarke, Dwaine Clarke, Blaise Gassend, ...
Secure processors enable new sets of applications such as commercial grid computing, software copy-protection, and secure mobile agents by providing security from both physical and software attacks....
Speeding up Exponentiation using an Untrusted Computational Resource (2003)
Dwaine Clarke, Dwaine Clarke, Srinivas Devadas, Srinivas Devadas, Marten Van Dijk, Marten Van Dijk, ...
Abstract. We present protocols for speeding up fixed-base exponentiation and variablebase exponentiation using an untrusted computation resource. In the fixed-base protocols, the base and exponent...
Caches and Hash Trees for Efficient Memory Integrity Verification (2003)
Blaise Gassend, G. Edward Suh, Dwaine Clarke, Marten Van Dijk, Srinivas Devadas
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications such as certified...
A new memory monitoring scheme for memory-aware scheduling and partitioning (2002)
G. Edward Suh, Srinivas Devadas, Larry Rudolph
We propose a low overhead, on-line memory monitoring scheme utilizing a set of novel hardware counters. The counters indicate the marginal gain in cache hits as the size of the cache is increased,...
Offline integrity checking of untrusted storage (2002)
Dwaine Clarke, Blaise Gassend, G. Edward Suh, Marten Van Dijk, Srinivas Devadas
We extend the o#ine memory correctness checking scheme presented by Blum et. al [BEG
Hardware mechanisms for memory integrity checking (2002)
G. Edward Suh, Dwaine Clarke, Blaise Gassend, Marten Van Dijk, Srinivas Devadas
Memory integrity verification is a useful primitive when implementing secure processors that are resistant to attacks on hardware components. This paper proposes new hardware schemes to verify the...
Offline integrity checking of untrusted storage (2002)
Dwaine Clarke, Blaise Gassend, G. Edward Suh, Marten Van Dijk, Srinivas Devadas
We extend the offline memory correctness checking scheme presented by Blum et. al [BEG + 91] to develop an offline checker that can detect attacks by active adversaries. We introduce the concept of...
A new memory monitoring scheme for memory-aware scheduling and partitioning (2002)
G. Edward Suh, Srinivas Devadas, Larry Rudolph
We propose a low overhead, on-line memory monitoring scheme utilizing a set of novel hardware counters. The counters act like pressure gauges indicating the marginal gain in the number of hits from...
Dynamic Cache Partitioning for Simultaneous Multithreading Systems (2001)
G. Edward Suh, Larry Rudolph, Srinivas Devadaslaboratory, Computer Science
ABSTRACTThis paper proposes a dynamic cache partitioning method for simultaneous multithreading systems. We present ageneral partitioning scheme that can be applied to setassociative caches at any...
Dynamic Cache Partitioning for Simultaneous Multithreading Systems (2001)
G. Edward Suh, Larry Rudolph, Srinivas Devadaslaboratory, Computer Science
ABSTRACTThis paper proposes a dynamic cache partitioning method for simultaneous multithreading systems. We present ageneral partitioning scheme that can be applied to setassociative caches at any...
Dynamic Cache Partitioning for Simultaneous Multithreading Systems (2001)
G. Edward Suh, Larry Rudolph, Srinivas Devadas
This paper proposes a dynamic cache partitioning method for simultaneous multithreading systems. We present a general partitioning scheme that can be applied to setassociative caches at any partition...
Effects of memory performance on parallel job scheduling (2001)
G. Edward Suh, Larry Rudolph, Srinivas Devadas
Abstract. We develop a new metric for job scheduling that includes the effects of memory contention amongst simultaneously-executing jobs that share a given level of memory. Rather than assuming each...
Analytical Cache Models with Applications to Cache Partitioning (2001)
G. Edward Suh, Srinivas Devadas, Larry Rudolph
An accurate, tractable, analytic cache model for time-shared systems is presented, which estimates the overall cache missrate of a multiprocessing system with any cache size and time quanta. The...
Effects of memory performance on parallel job scheduling (2001)
G. Edward Suh, Larry Rudolph, Srinivas Devadas
Abstract. We develop a new metric for job scheduling that includes the effects of memory contention amongst simultaneously-executing jobs that share a given level of memory. Rather than assuming each...
Analytical Cache Models with Applications to Cache Partitioning (2001)
G. Edward Suh, Srinivas Devadas, Larry Rudolph
An accurate, tractable, analytic cache model for time-shared systems is presented, which estimates the overall cache missrate of a multiprocessing system with any cache size and time quanta. The...
Scheduler-Based Prefetching for Multilevel Memories (2001)
Derek Chiou, Srinivas Devadas, Josh Jacobs, Prabhat Jain, Vinson Lee, Enoch Peserico, ...
Memory latency is a significant bottleneck in modern computing systems. With few exceptions, the process/thread/task currently running on the CPU implicitly owns all caches and main memory....
Enoch Peserico, Srinivas Devadas, Larry Rudolph, G. Edward Suh, Enoch Peserico, Srinivas Devadas, ...
When multiple applications have to time-share limited physical memory resources, they can incur significant performance degradation at the beginning of their respective time slices due to page...
E ects of Memory Performance on Parallel Job Scheduling (2001)
Larry Rudolph, Srinivas Devadas, G. Edward Suh, Larry Rudolph, Srinivas Devadas
Abstract. We develop a new metric for job scheduling that includes the e ects of memory contention amongst simultaneously-executing jobs that share a given level of memory. Rather than assuming each...
Analytical Cache Models with Applications to Cache Partitioning (2001)
G. Edward Suh, Srinivas Devadas, Srinivas Devadas, Larry Rudolph, Larry Rudolph
An accurate, tractable, analytic cache model for time-shared systems is presented, which estimates the overall cache missrate of a multiprocessing system with any cache size and time quanta. The...