Hideharu Amano, Akiya Jouraku, Kenichiro Anjo
dynamically adaptive switching fabric on a multicontext reconfigurable device
Toshiro Kitaoka, Hideharu Amano, Kenichiro Anjo
the configuration loading time of a coarse grain multicontext reconfigurable device
Folded Fat H-Tree: An Interconnection Topology for Dynamically Reconfigurable Processor Array (2005)
Yutaka Yamada, Hideharu Amano, Michihiro Koibuchi, Akiya Jouraku, Kenichiro Anjo, Katsunobu Nishimura
Abstract. Fat H-Tree is a novel on-chip network topology for a dynamic reconfigurable processor array. It includes both fat tree and torus structure, and suitable to map tasks in a stream processing....
BLACK-BUS: A New Data-Transfer Technique using Local Address on Networks-on-Chips (2004)
Kenichiro Anjo, Yutaka Yamada, Michihiro Koibuchi, Akiya Jouraku, Hideharu Amano
Network-on-a-Chip (NoC) has received attention as a high-performance interconnect, because traditional buses, which can’t transfer more than one data-stream simultaneously, are more likely to...