Federation:RepurposingScalarCoresforOut-of-Order (2009)
David Tarjan, Michael Boyer, Kevin Skadron
Future SoCs will contain multiple cores. For workloads with significant parallelism, prior work has shown the benefit of many small, multi-threaded, scalar cores. For workloads that require better...
Automated Dynamic Analysis of CUDA Programs (2009)
Michael Boyer, Kevin Skadron, Westley Weimer
Recent increases in the programmability and performance of GPUs have led to a surge of interest in utilizing them for general-purpose computations. Tools such as NVIDIA’s Cuda allow programmers to...
Wei Huang, Mircear. Stan, Karthik Sankaranarayanan, Robert J. Rib, Kevin Skadron
Air cooling limits have been a major design challenge in recent years for integrated circuits. Multi-core exacerbates thermal challenges because power scales with the number of cores, but also...
Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model (2009)
Wei Huang, Karthik Sankaranarayanan, Kevin Skadron, Senior Member, Robert J. Rib, Mircea R. Stan, ...
Abstract — Preventing silicon chips from negative, even disastrous thermal hazards has become increasingly challenging these days; considering thermal effects early in the design cycle is thus...
Accelerating Compute-Intensive Applications with GPUs and FPGAs (2009)
Shuai Che, Jie Li, Jeremy W. Sheaffer, Kevin Skadron, John Lach
Abstract—Accelerators are special purpose processors designed to speed up compute-intensive sections of applications. Two extreme endpoints in the spectrum of possible accelerators are FPGAs and...
A Performance Study of General-Purpose Applications on Graphics Processors Using CUDA (2009)
Shuai Che, Michael Boyer, Jiayuan Meng, David Tarjan, Jeremy W. Sheaffer, Kevin Skadron
Graphics processors (GPUs) provide a vast number of simple, data-parallel, deeply multithreaded cores and high memory bandwidths. GPU architectures are becoming increasingly programmable, offering...
Multi-mode Energy Management for Multi-tier Server Clusters (2009)
This paper presents an energy management policy for reconfigurable clusters running a multi-tier application, exploiting DVS together with multiple sleep states. We develop a theoretical analysis of...
Multi-mode Energy Management for Multi-tier Server Clusters (2009)
This paper presents an energy management policy for reconfigurable clusters running a multi-tier application, exploiting DVS together with multiple sleep states. We develop a theoretical analysis of...
Dynamic Voltage Scaling in Multi-tier Web Servers with End-to-end Delay Control (2008)
Tibor Horvath, Tarek Abdelzaher, Kevin Skadron
Energy and cooling costs of web server farms are among their main financial expenditures. This paper explores the benefits of dynamic voltage scaling (DVS) for power management in server farms....
Yingmin Li, David Brooks, Zhigang Hu, Kevin Skadron, Pradip Bose
Simultaneous multithreading (SMT) has proven to be an effective method of increasing the performance of microprocessors by extracting additional instruction-level parallelism from multiple threads....
EXPLORES THE FUTURE OF LOW-POWER DESIGN AND TEMPERATURE MANAGEMENT. (2008)
Kevin Skadron, Kanad Ghose, Resit Sendag, Joshua J. Yi, Derek Chiou
...... In recent years, power dissipation has become an area of intense concern to the designers of microprocessors for various reasons. Today’s processors require sophisticated and expensive...
Kevin Skadron, Margaret Martonosi, David I. August, Mark D. Hill, David J. Lilja, Vijay S. Pai
National Science Foundation argues that simulation and benchmarking technology will require a leap in capability within the next few years to maintain ongoing innovation in computer systems. 30...
Evaluating Trace Cache Energy-Efficiency (2008)
Future fetch engines need to be energy-efficient. Therefore, a thorough evaluation and comparison of fetch engine design is necessary for futuristic processors. Our work compares the...
Yingmin Li, David Brooks, Zhigang Hu, Kevin Skadron, Pradip Bose
Simultaneous multithreading (SMT) has proven to be an effective method of increasing the performance of microprocessors by extracting additional instruction-level parallelism from multiple threads....
On-Demand Solution to Minimize I-Cache Leakage Energy with Maintaining Performance (2008)
Sung Woo Chung, Ieee Computer Society, Kevin Skadron, Senior Member
Abstract—This paper describes a new on-demand wake-up prediction policy for reducing leakage power. The key insight is that branch prediction can be used to selectively wake up only the needed...
Evaluating Trace Cache Energy-Efficiency (2008)
Future fetch engines need to be energy-efficient. Therefore, a thorough evaluation and comparison of fetch engine design is necessary for futuristic processors. Our work compares the...
Implementing Decay Techniques using 4T Quasi-Static Memory Cells (2008)
Philo Juang Ý, Phil Diodato Þ, Stefanos Kaxiras Þ, Kevin Skadron, Zhigang Hu Ý, Margaret Martonosi Ý, ...
This paper proposes the use of four-transistor (4T) cache and branch predictor array cell designs to address increasing worries regarding leakage power dissipation. While 4T designs lose state when...
Kevin Skadron, Margaret Martonosi, David I. August, Mark D. Hill, David J. Lilja, Vijay S. Pai
National Science Foundation argues that simulation and benchmarking technology will require a leap in capability within the next few years to maintain ongoing innovation in computer systems. 30...
Timo Aila, Mark Segal (editors, Jeremy W. Sheaffer, David P. Luebke, Kevin Skadron
General purpose computation on graphics processors (GPGPU) has rapidly evolved since the introduction of commodity programmable graphics hardware. With the appearance of GPGPU computation-oriented...
Quantifying Latency and Throughput Compromises in CMP Design (2008)
Yingmin Li, Kevin Skadron, Benjamin Lee, David Brooks
Designers of chip multiprocessors will increasingly be called upon to optimize for a combination of design metrics under a variety of design constraints. The adoption of chip multiprocessors has also...
Kevin Skadron, Margaret Martonosi, Zhigang Hu, Douglas W. Clark, Philip W. Diodato, Stefanos Kaxiras, ...
With semiconductor technology advancing toward deep submicron, leakage energy is of increasing concern, especially for large on-chip array structures such as caches and branch predictors. Recent work...
Kevin Skadron, Margaret Martonosi, Zhigang Hu, Douglas W. Clark, Philip W. Diodato, Stefanos Kaxiras, ...
With semiconductor technology advancing toward deep submicron, leakage energy is of increasing concern, especially for large on-chip array structures such as caches and branch predictors. Recent work...
John W. Haskins, Kevin Skadron
To reduce the cost of cycle-accurate software simulation of microarchitectures, many researchers use statistical sampling: by simulating only a small, representative subset of the end-to-end dynamic...
Evaluating Trace Cache Energy Efficiency (2008)
Future fetch engines need to be energy efficient. Much research has focused on improving fetch bandwidth. In particular, previous research shows that storing concatenated basic blocks to form...
Abstract Adaptive Cache Decay using Formal Feedback Control (2008)
Sivakumar Velusamy, Karthik Sankaranarayanan, Dharmesh Parikh, Tarek Abdelzaher, Kevin Skadron
This paper argues that adaptive techniques in processor architecture should be designed using formal feedback-control theory. We use the derivation of a controller for cache decay—a technique for...
Kevin Skadron, Margaret Martonosi, Zhigang Hu, Douglas W. Clark, Philip W. Diodato, Stefanos Kaxiras, ...
With semiconductor technology advancing toward deep submicron, leakage energy is of increasing concern, especially for large on-chip array structures such as caches and branch predictors. Recent work...
Exploring the Impact of Normality and Significance Tests in Architecture Experiments ABSTRACT (2008)
Pitchaya Sitthi-amorn, Kevin Skadron
Computer architects often use statistical tools such as means in reporting results. While there has been discussion regarding which means to use for different metrics, the impact of the underlying...
Interconnect Lifetime Prediction for Reliability-Aware Systems (2008)
Zhijian Lu, Student Member, Wei Huang, Mircea R. Stan, Senior Member, Kevin Skadron, ...
Abstract—Thermal effects are becoming a limiting factor in high-performance circuit design due to the strong temperature dependence of leakage power, circuit performance, IC package cost, and...
Impact of Thermal Constraints on Multi-Core Architectures (2008)
Yingmin Li, Benjamin Lee, David Brooks, Zhigang Hu, Kevin Skadron
This paper shows how thermal constraints affect the multidimensional design space for chip multiprocessors, considering the inter-related variables of CPU count, pipeline depth, superscalar width, L2...
EXPERIENCES USING FPGAS FOR TEMPERATURE-AWARE MICROARCHITECTURE RESEARCH (2008)
Siva Velusamy, Wei Huang, John Lach, Mircea Stan, Kevin Skadron
Ever increasing microprocessor power densities has brought temperature-aware microarchitecture research to the forefront. In this paper, we describe our experiences in creating an FPGA based testbed...
Kevin Skadron, Marty Humphrey, Bin Huang, Edgar Hilton, Jihao Luo, Paul Allaire
This paper describes the use of Intel Pentium-III SSE instructions for high-order control computations in a high-spinrate flywheel. This application is representative of many control environments...
Abstract Multipath Execution: Opportunities and Limits (2008)
Pritpal S. Ahuja, Kevin Skadron, Margaret Martonosi Y, Douglas W. Clark
Even sophisticated branch-prediction techniques necessarily suffer some mispredictions, and even relatively small mispredict rates hurt performance substantially in current-generation processors. In...
A Novel Software Solution for Localized Thermal Problems (2008)
Abstract. In this paper, we propose a temperature-aware DFS (Dynamic Frequency Scaling) technique using the performance counters that is already embedded in the commercial microprocessors. By using...
Abstract-This paper describes a new on-demand wakeup prediction policy for reducing leakage power. The key insight is that branch prediction can be used to selectively wake up only the needed cache...
Impact of Thermal Constraints on Multi-Core Architectures (2008)
Yingmin Li, Benjamin Lee, David Brooks, Zhigang Hu, Kevin Skadron
This paper shows how thermal constraints affect the multidimensional design space for chip multiprocessors, considering the inter-related variables of CPU count, pipeline depth, superscalar width, L2...
Categories and Subject Descriptors: C1.1 [Computer Systems Organization]: Procecessor (2008)
We introduce the hashed perceptron predictor, which merges the concepts behind the gshare, path-based and perceptron branch predictors. This predictor can achieve superior accuracy to a path-based...
Zhijian Lu, John Lach, Mircea R. Stan, Kevin Skadron
(along with resulting increases in power density) has made thermal-related reliability a major concern in modern IC design. For example, in the deep-submicron region, experts widely regard...
An Improved Block-Based Thermal Model in HotSpot 4.0 with Granularity Considerations (2008)
Wei Huang, Karthik Sankaranarayanan, Robert J. Rib, Mircea R. Stan, Kevin Skadron
This paper describes our most recent improvements to the HotSpot thermal model. First, in response to a previous paper in WDDD 2006 [1] that cites some accuracy shortcomings, we improve treatment in...
and Design]: Real-time systems and embedded systems (2008)
Yan Zhang, Zhijian Lu, John Lach, Kevin Skadron, Mircea R. Stan
This paper presents an optimal procrastinating voltage scheduling (OP-DVS) for hard real-time systems using stochastic workload information. Algorithms are presented for both single-task and...
Enhancing Energy Efficiency in Multi-tier Web Server Clusters via Prioritization (2008)
This paper investigates the design issues and energy savings benefits of service prioritization in multi-tier web server clusters. In many services, classes of clients can be naturally assigned...
Automated dynamic analysis of CUDA programs (2008)
Michael Boyer, Kevin Skadron, Westley Weimer
Recent increases in the programmability and performance of GPUs have led to a surge of interest in utilizing them for general-purpose computations. Tools such as NVIDIA’s Cuda allow programmers to...
Many-Core Design from a Thermal Perspective: Extended Analysis and Results (2008)
Wei Huang, Mircea R. Stan, Karthik Sankaranarayanan, Robert J. Rib, Kevin Skadron
Air cooling limits have been a major design challenge in recent years for integrated circuits. Multi-core exacerbates thermal challenges because power scales with the number of cores, but also...
A New Method for Measurement of Urban Decentralization (2007)
Kevin Skadron, For Dr. Mieszkowski
The standard model used in studies of urban decentralization is the monocentric model with its implication of an exponential density gradient. Exponential density gradients have been estimated for...
Urban Centralization in U.S. Cities prior to World War II: Experience with a New Metric (2007)
Effective urban management and planning requires an understanding of the forces driving cities' development. Trends in population density and distribution are of particular importance, but are...
Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Zhigang Hu, Margaret Martonosi
This paper proposes the use of four-transistor (4T) cache and branch predictor array cell designs to address increasing worries regarding leakage power dissipation. While 4T designs lose state when...
Zhigang Hu, Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Margaret Martonosi
Much of on-chip storage is devoted to transient, often short-lived, data. Despite this, virtually all on-chip array structures use sixtransistor (6T) static RAM cells that store data indefinitely. In...
Abstract Adaptive Cache Decay using Formal Feedback Control (2007)
Sivakumar Velusamy, Karthik Sankaranarayanan, Dharmesh Parikh, Tarek Abdelzaher, Kevin Skadron
This paper argues that adaptive techniques in processor architecture should be designed using formal feedback-control theory. We use the derivation of a controller for cache decay—a technique for...
Asynchronous Checkpointing for PVM Requires Message-Logging (2007)
Distributed computing using networked workstations offers cost-efficient parallel computing, but the higher rate of failure requires effective fault-tolerance. Asynchronous consistent checkpointing...
Power Issues Related to Branch Prediction — University Of Virginia Tech.Report CS-2001-25 — (2007)
Dharmesh Parikh, Kevin Skadron, Yan Zhang, Marco Barcella, Mircea R. Stan
dharmesh,skadron¤ This paper explores the role of branch predictor organization in power/energy/performance tradeoffs for processor design. We find that as a general rule, to reduce overall energy...
Kevin Skadron, Tarek Abdelzaher, Mircea R. Stan
This paper proposes the use of formal feedback control theory as a way to implement adaptive techniques in the processor architecture. Dynamic thermal management (DTM) is used as a test vehicle, and...
Alloyed Branch History: Combining Global and Local Branch History for Robust Performance (2007)
This paper introduces alloyed prediction, a new two-level predictor organization that combines global and local history in the same structure, combining the advantages of two-level predictors and...
A Microprocessor Survey Course for Learning Advanced Computer Architecture (2007)
A course that surveys state-of-the-art microprocessors offers an excellent forum for students to see how computer architecture techniques are employed in practice and for them to gain a detailed...
Kevin Skadron, Marty Humphrey, Bin Huang, Edgar Hilton, Jihao Luo, Paul Allaire
This paper describes the use of Intel Pentium-III SSE instructions for high-order control computations in a high-spinrate flywheel. This application is representative of many control environments...
Dynamic Way Allocation for High Performance, Low Power Caches (2007)
Matthew Ziegler Adam, Adam Spanberger, Ganesh Pai, Mircea Stan, Kevin Skadron
Introduction Current cache configurations are inflexible. They cannot be customized for the needs of individual programs. Concurrent processes often have negative effects on each other's cache...
Supporting Higher-Order Controllers for Magnetic Bearings (2007)
Kevin Skadron, Marty Humphrey, Edgar Hilton, Paul Allaire
One approach for implementing a control system for a magnetic bearing suspension system for high-speed rotating machinery is to use embedded DSP boards.Yet control systems based on DSP boards often...
Jiayuan Meng, Greg Humphreys, Kevin Skadron
This paper describes the performance analysis of the light field refocusing algorithm running on different hardware specifications, including the Intel Pentium 4, SSE2(Streaming SIMD Extensions),...
Dynamic voltage scaling in multitier web servers with end-to-end delay control (2007)
Tibor Horvath, Tarek Abdelzaher, Kevin Skadron, Senior Member, Xue Liu
Abstract — Energy and cooling costs of web server farms are among their main financial expenditures. This paper explores the benefits of dynamic voltage scaling (DVS) for power management in server...
Impact of process variations on multicore performance symmetry (2007)
Eric Humenay, David Tarjan, Kevin Skadron
Multi-core architectures introduce a new granularity at which process variations may occur, yielding asymmetry among cores that were designed—and that software expects—to be symmetric in...
Micro-architecturally Independent Characteristics Abstract (2007)
Jiayuan Meng, Henry Cook, Kevin Skadron
Computer games have become a driving application in the personal computer industry. For computer architects designing general purpose microprocessors, understanding the characteristics of this...
Dynamic voltage scaling in multitier web servers with end-to-end delay control (2007)
Tibor Horvath, Tarek Abdelzaher, Kevin Skadron, Senior Member, Xue Liu
Abstract—The energy and cooling costs of Web server farms are among their main financial expenditures. This paper explores the benefits of dynamic voltage scaling (DVS) for power management in...
Dynamic voltage scaling in multitier web servers with end-to-end delay control (2007)
Tibor Horvath, Tarek Abdelzaher, Kevin Skadron, Xue Liu
Energy and cooling costs of web server farms are among their main financial expenditures. This paper explores the benefits of dynamic voltage scaling (DVS) for power management in server farms....
Impact of process variations on multicore performance symmetry (2007)
Eric Humenay, David Tarjan, Kevin Skadron
Multi-core architectures introduce a new granularity at which process variations may occur, yielding asymmetry among cores that were designed—and that software expects—to be symmetric in...
An Improved Block-Based Thermal Model in HotSpot 4.0 with Granularity Considerations (2007)
Wei Huang, Karthik Sankaranarayanan, Robert J. Rib, Mircea R. Stan, Kevin Skadron
This technical report describes our most recent improvements to the HotSpot thermal model. First, in response to a previous paper in WDDD 2006 [1] that cites some accuracy shortcomings, we improve...
Genetically Programmed Response Surfaces for Efficient Design Space Exploration (2007)
In spite of many efforts to speed up cycle-accurate architecture simulation, exponential increases in architectural design complexity threaten to make traditional design optimization techniques...
Kevin Dale, Jeremy W. Sheaffer, Vinu Vijay Kumar, David P. Luebke, Greg Humphreys, Kevin Skadron
This is a preprint of an article submitted for consideration
Applications of small-scale reconfigurability to graphics processors (2006)
Kevin Dale, Jeremy W. Sheaffer, Vinu Vijay Kumar, Davidp. Luebke, Greg Humphreys, Kevin Skadron
Abstract. We explore the application of Small-Scale Reconfigurability (SSR) to graphics hardware. SSR is an architectural technique wherein functionality common to multiple subunits is reused rather...
Impact of parameter variations on multi-core chips (2006)
Eric Humenay, David Tarjan, Kevin Skadron
Increasing variability during manufacturing and during runtime are projected for future generation microprocessors. This paper introduces a pre-RTL, architectural modeling methodology that...
Zhijian Lu, Wei Huang, Mircea Stan, Kevin Skadron, John Lach
Thermal effects are becoming a limiting factor in high performance circuit design due to the strong temperature dependence of leakage power, circuit performance, IC package cost and reliability....
Using on-chip event counters for high-resolution, real-time temperature measurements (2006)
This paper proposes a technique to use on-chip event- or performance-counters to augment, or even replace, traditional analog CMOS temperature sensors. Using activity data from the performance...
Hotspot: A compact thermal modeling method for CMOS VLSI systems (2006)
Wei Huang, Student Member, Shougata Ghosh, Siva Velusamy, Karthik Sankaranarayanan, Kevin Skadron, ...
Abstract—This paper presents HotSpot—a modeling methodology for developing compact thermal models based on the popular stacked-layer packaging scheme in modern very large-scale integration...
CMP design space exploration subject to physical constraints (2006)
Yingmin Li, Benjamin Lee, David Brooks, Zhigang Hu, Kevin Skadron
This paper explores the multi-dimensional design space for chip multiprocessors, exploring the inter-related variables of core count, pipeline depth, superscalar width, L2 cache size, and operating...
Using Branch Prediction Information for Near-Optimal I-Cache Leakage (2006)
This paper describes a new on-demand wakeup prediction policy for instruction cache leakage control that achieves better leakage savings than prior policies, and avoids the performance overheads of...
Using Branch Prediction Information for Near-Optimal I-Cache Leakage (2006)
Abstract. This paper describes a new on-demand wakeup prediction policy for instruction cache leakage control that achieves better leakage savings than prior policies, and avoids the performance...
Measuring Parameter Variation on an FPGA Using Ring Oscillators (2006)
Anindo Mukherjee, Kevin Skadron
As processor clock frequencies become faster, architecture-level design is becoming increasingly limited by factors such as on-chip variation. Parameter variation occurs in integrated circuits as the...
Applications of small-scale reconfigurability to graphics processors (2006)
Kevin Dale, Jeremy W. Sheaffer, Vinu Vijay Kumar, David P. Luebke, Greg Humphreys, Kevin Skadron
Abstract. We explore the application of Small-Scale Reconfigurability (SSR) to graphics hardware. SSR is an architectural technique wherein functionality common to multiple subunits is reused rather...
CMP design space exploration subject to physical constraints (2006)
Yingmin Li, Benjamin Lee, David Brooks, Zhigang Hu, Kevin Skadron
This paper explores the multi-dimensional design space for chip multiprocessors, exploring the inter-related variables of core count, pipeline depth, superscalar width, L2 cache size, and operating...
Design and implementation of an energy efficient multimedia playback system (2006)
Zhijian Lu, John Lach, Mircea Stan, Kevin Skadron
Mobile devices capable of multimedia playback have become popular consumer items, making techniques for energy management during multimedia decoding increasingly important. In this paper, we model...
Procrastinating voltage scheduling with discrete frequency sets (2006)
Zhijian Lu, Yan Zhang, Mircea Stan, John Lach, Kevin Skadron
This paper presents an efficient method to find the optimal intra-task voltage/frequency scheduling for single tasks in practical real-time systems using statistical workload information. Our method...
Procrastinating voltage scheduling with discrete frequency sets (2006)
Zhijian Lu, Yan Zhang, Mircea Stan, John Lach, Kevin Skadron
This paper presents an efficient method to find the optimal intra-task voltage/frequency scheduling for single tasks in practical real-time systems using statistical workload information. Our method...
Kevin Dale, Jeremy W. Sheaffer, Vinu Vijay Kumar, David P. Luebke, Greg Humphreys, Kevin Skadron
This is a preprint of an article submitted for consideration
Power and Thermal Effects of SRAM vs. LatchMux Design (2005)
Yingmin Li, Kevin Skadron, David Brooks, Mark Hempstead, Patrick Mauro, Zhigang Hu
Performance, energy, and thermal considerations for SMT and CMP architectures (2005)
Yingmin Li, David Brooks, Zhigang Hu, Kevin Skadron
Simultaneous multithreading (SMT) and chip multiprocessing (CMP) both allow a chip to achieve greater throughput, but their relative energy-efficiency and thermal properties are still poorly...
Performance, energy, and thermal considerations for SMT and CMP architectures (2005)
Yingmin Li, David Brooks, Zhigang Hu, Kevin Skadron
Simultaneous multithreading (SMT) and chip multiprocessing (CMP) both allow a chip to achieve greater throughput, but their relative energy-efficiency and thermal properties are still poorly...
A case for thermal-aware floorplanning at the microarchitectural level (2005)
Karthik Sankaranarayanan, Sivakumar Velusamy, Mircea Stan, Charles L, Kevin Skadron
In current day microprocessors, exponentially increasing power densities, leakage, cooling costs, and reliability concerns have resulted in temperature becoming a first class design constraint like...
Analytical Model for Sensor Placement on Microprocessors (2005)
Kyeong-jae Lee, Kevin Skadron, Wei Huang
Thermal management in microprocessors has become a major design challenge in recent years. Thermal monitoring through hardware sensors is important, and these sensors must be carefully placed on the...
Banking chip lifetime: Opportunities and implementation (2005)
Zhijian Lu, John Lach, Mircea Stan, Kevin Skadron
Most existing integrated circuit reliability models assume a uniform, typically worst-case, operating temperature, but temporal and spatial temperature variations affect expected device lifetime. As...
Applications of small scale reconfigurability to graphics processors (2005)
Kevin Dale, Jeremy W. Sheaffer, Vinu Vijay Kumar, David P. Luebke, Greg Humphreys, Kevin Skadron
We explore the application of Small-Scale Reconfigurability (SSR) to graphics hardware. SSR is a relatively new architectural technique wherein functionality common to multiple subunits is reused...
Temperature-Aware Modeling and Banking of IC Lifetime Reliability (2005)
Zhijian Lu, John Lach, Mircea Stan, Kevin Skadron
Most existing integrated circuit (IC) reliability models assume a uniform, typically worst-case, operating temperature, but temporal and spatial temperature variations affect expected device...
Performance, energy, and thermal considerations for SMT and CMP architectures (2005)
Yingmin Li, David Brooks, Zhigang Hu, Kevin Skadron
Simultaneous multithreading (SMT) and chip multiprocessing (CMP) both allow a chip to achieve greater throughput, but their relative energy-efficiency and thermal properties are still poorly...
A break-even formulation for evaluating branch predictor energy efficiency (2005)
Recent work has demonstrated that a better branch predictor can increase the energy-efficiency of the system, even if the new predictor consumes more energy. Consequently, understanding the tradeoff...
On my honor as a University student, on this assignment I have neither given nor received unauthorized aid as defined by the Honor Guidelines for Papers in Science, Technology, and Society Courses.
Power and Thermal Effects of SRAM vs. LatchMux Design (2005)
Yingmin Li, Mark Hempstead, Patrick Mauro, David Brooks, Zhigang Hu, Kevin Skadron
This paper studies the impact on energy efficiency and thermal behavior of design style and clock-gating style in queue and array structures. These structures are major sources of power dissipation,...
Monitoring temperature in FPGA based SoCs (2005)
Siva Velusamy, Wei Huang, John Lach, Mircea Stan, Kevin Skadron
FPGA logic densities continue to increase at a tremendous rate. This has had the undesired consequence of increased power density, which manifests itself as higher ondie temperatures and local...
A break-even formulation for evaluating branch predictor energy efficiency (2005)
Recent work has demonstrated that a better branch predictor can increase the energy-efficiency of the system, even if the new predictor consumes more energy. Consequently, understanding the tradeoff...
Parameterized physical compact thermal modeling (2005)
Wei Huang, Student Member, Mircea R. Stan, Kevin Skadron, Senior Member, Senior Member
Abstract—This paper presents a compact thermal modeling (CTM) approach, which is fully parameterized according to design geometries and material physical properties. While most compact modeling...
The need for a full-chip and package thermal model for thermally optimized ic designs (2005)
Wei Huang, Eric Humenay, Kevin Skadron, Mircea R. Stan
Modeling and analyzing detailed die temperature with a full-chip thermal model at early design stages is important to discover and avoid potential thermal hazards. However, omitting important aspects...
Experiments to determine the potential for program-level and/or phase-level adaptation of branch predictor configuration for the purpose of total processor energy savings were performed. The...
Analytical Model for Sensor Placement on Microprocessors (2005)
Kyeong-jae Lee, Kevin Skadron, Wei Huang
Thermal management in microprocessors has become a major design challenge in recent years. Thermal monitoring through hardware sensors is important, and these sensors must be carefully placed on the...
Performance, energy, and thermal considerations for SMT and CMP architectures (2005)
Yingmin Li, David Brooks, Zhigang Hu, Kevin Skadron
Simultaneous multithreading (SMT) and chip multiprocessing (CMP) both allow a chip to achieve greater throughput, but their relative energy-efficiency and thermal properties are still poorly...
Toward an architectural treatment of parameter variations (2005)
Eric Humenay, Wei Huang, Mircea R. Stan, Kevin Skadron
This paper develops a new model of parameter variations for use in early-stage, pre-RTL architecture studies. It improves over prior models by extending the FMAX model to more faithfully model...
Power and Thermal Effects of SRAM vs. LatchMux Design (2005)
Yingmin Li, Mark Hempstead, Patrick Mauro, David Brooks, Zhigang Hu, Kevin Skadron
This paper studies the impact on energy efficiency and thermal behavior of design style and clock-gating style in queue and array structures. These structures are major sources of power dissipation,...
Performance, energy, and thermal considerations for SMT and CMP architectures (2005)
Yingmin Li, David Brooks, Zhigang Hu, Kevin Skadron
Simultaneous multithreading (SMT) and chip multiprocessing (CMP) both allow a chip to achieve greater throughput, but their relative energy-efficiency and thermal properties are still poorly...
Microarchitectural floorplanning for thermal management: A technical report (2005)
Karthik Sankaranarayanan, Sivakumar Velusamy, Kevin Skadron, Mircea Stan
In current day microprocessors, exponentially increasing power densities, leakage, cooling costs, and reliability concerns have resulted in temperature becoming a first class design constraint like...
Monitoring temperature in FPGA based SoCs (2005)
Siva Velusamy, Wei Huang, John Lach, Kevin Skadron
FPGA logic densities continue to increase at a tremendous rate. This has had the undesired consequence of increased power density, which manifests itself as higher on-die temperatures and local...
Compact thermal modeling for temperature-aware design (2004)
Wei Huang, Mircea R. Stan, Kevin Skadron, Karthik Sankaranarayanan, Shougata Ghosh, Sivakumar Velusamy
Thermal design in sub-100nm technologies has become one of the major challenges to the CAD community. Thermal effects on design aspects such as performance, power and reliability have to be...
Power-Aware Branch Prediction: Characterization and Design (2004)
Dharmesh Parikh, Kevin Skadron, Yan Zhang, Mircea Stan
This paper uses Wattch and the SPEC 2000 integer and floating-point benchmarks to explore the role of branch predictor organization in power/energy/performance tradeoffs for processor design. Even...
Analysis of Temporal and Spatial Temperature Gradients for IC Reliability (2004)
Zhijian Lu, Wei Huang, Shougata Ghosh, John Lach, Mircea Stan, Kevin Skadron
One of the most common causes of IC failure is interconnect electromigration (EM), which exhibits a rate that is exponentially dependent on temperature. As a result, EM rate is one of the major...
State-Preserving vs. Non-State-Preserving Leakage Control in Caches (2004)
Dharmesh Parikh, Yan Zhang, Karthik Sankaranarayanan, Kevin Skadron, Mircea Stan
This paper compares the effectiveness of statepreserving and non-state-preserving techniques for leakage control in caches by comparing drowsy cache and gated-V¦§ ¦ for data caches using 70nm...
The Importance of Temporal and Spatial Temperature Gradients in IC (2004)
Reliability Analysis Univ, Wei Huang, Zhijian Lu, Shougata Ghosh, John Lach, Mircea Stan, ...
Existing IC reliability models assume a uniform, typically worst-case, operating temperature, but temporal and spatial temperature variations affect expected device lifetime. This paper presents a...
Implementing Branch Predictor Decay Using Quasi-Static Memory Cells (2004)
Philo Juang, Kevin Skadron, Margaret Martonosi, Zhigang Hu, Douglas W. Clark, Philip W. Diodato, ...
This paper evaluates design options related to these questions
Compact thermal modeling for temperature-aware design (2004)
Wei Huang, Mircea R. Stan, Kevin Skadron, Karthik Sankaranarayanan, Shougata Ghosh, Sivakumar Velusamy
Thermal design in sub-100nm technologies is one of the major challenges to the CAD community. In this paper, we first introduce the idea of temperature-aware design. We then propose a compact thermal...
Power-Aware Branch Prediction: Characterization and Design (2004)
Dharmesh Parikh, Kevin Skadron, Yan Zhang, Student Member, Mircea Stan, Senior Member
Abstract—This paper uses Wattch and the SPEC 2000 integer and floating-point benchmarks to explore the role of branch predictor organization in power/energy/performance trade offs for processor...
Hybrid architectural dynamic thermal management (2004)
When an application or external environmental conditions cause a chip’s cooling capacity to be exceeded, dynamic thermal management (DTM) dynamically reduces the power density on the chip to...
Wei Huang, Mircea R. Stan, Kevin Skadron
This paper presents an approach of compact thermal modeling — HotSpot, which is parameterized according to design geometrical dimensions and material physical properties. While most existing...
State-Preserving vs. Non-State-Preserving Leakage Control in Caches (2004)
Yingmin Li, Dharmesh Parikh, Yan Zhang, Karthik Sankaranarayanan, Mircea Stan, Kevin Skadron
yingmin,dharmesh,karthick,skadron¥ This paper compares the effectiveness of statepreserving and non-state-preserving techniques for leakage control in caches by comparing drowsy cache and...
State-Preserving vs. Non-State-Preserving Leakage Control in Caches (2004)
Dharmesh Parikh, Yan Zhang, Karthik Sankaranarayanan, Kevin Skadron, Mircea Stan
This paper compares the effectiveness of state-preserving and non-state-preserving techniques for leakage control in caches by comparing drowsy cache and gated-V§¨ § for data caches using 70nm...
Evaluating the thermal efficiency of SMT and CMP architectures (2004)
Yingmin Li, Zhigang Hu, David Brooks, Kevin Skadron
Simultaneous multithreading (SMT) and chip multiprocessing (CMP) both allow a chip to achieve greater throughput, but their thermal properties are still poorly understood. This paper uses Turandot,...
Profile-based adaptation for cache decay (2004)
Karthik Sankaranarayanan, Kevin Skadron
“Cache decay ” is a set of leakage-reduction mechanisms that put cache lines that have not been accessed for a specific duration into a low-leakage standby mode. This duration is called the decay...
Interconnect lifetime prediction under dynamic stress for reliability-aware design (2004)
Zhijian Lu, Wei Huang, John Lach, Mircea Stan, Kevin Skadron
Thermal effects are becoming a limiting factor in highperformance circuit design due to the strong temperaturedependence of leakage power, circuit performance, IC package cost and reliability. While...
Mark D. Hill, Kevin Skadron, Margaret Martonosi, David I. August, Mark D. Hill
Many future multiprocessor servers will execute large commercial workloads, such as database management systems and web servers. Thus, simulations of new multiprocessor designs should run these...
A Multigrid Solver for Boundary Value Problems Using Programmable Graphics Hardware (2003)
Nolan Goodnight, Gregory Lewin, David Luebke, Kevin Skadron
Abstract—We present a method for using programmable graphics hardware to solve a variety of boundary value problems. The time-evolution of such problems is frequently governed by partial...
Temperature-aware microarchitecture (2003)
Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Sankaranarayanan, David Tarjan
With power density and hence cooling costs rising exponentially, processor packaging can no longer be designed for the worst case, and there is an urgent need for runtime processor-level techniques...
A multigrid solver for boundary-value problems using programmable graphics hardware (2003)
Nolan Goodnight, Gregory Lewin, David Luebke, Kevin Skadron
Abstract—We present a method for using programmable graphics hardware to solve a variety of boundary value problems. The time-evolution of such problems is frequently governed by partial...
Temperature-aware microarchitecture (2003)
Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Sankaranarayanan, David Tarjan
skadron,siva,karthick,dtarjan¦ With power density and hence cooling costs rising exponentially, processor packaging can no longer be designed for the worst case, and there is an urgent need for...
Memory reference reuse latency: Accelerated sampled microarchitecture simulation (2003)
John W. Haskins, Jr. Kevin Skadron
Copyright c fl 2002 This paper explores techniques for speeding up sampled microprocessor simulations by exploiting the observation that of the memory references that precede a sample, references...
Interconnect Lifetime Prediction for Temperature-Aware Design (2003)
Univ Of Virginia, Zhijian Lu, Mircea Stan, John Lach, Kevin Skadron
Thermal e#ects are becoming a limiting factor in high-performance circuit design due to the strong temperature-dependence of leakage power, circuit performance, IC package cost and reliability....
Power-aware QoS Management in Web Servers (2003)
Vivek Sharma Arun, Arun Thomas, Tarek Abdelzaher, Kevin Skadron, Zhijian Lu
Power management in data centers has become an increasingly important concern. Large server installations are designed to handle peak load, which may be significantly larger than in off-peak...
Univ Of Virginia, Kevin R. Hirst, John W. Haskins, Kevin Skadron
This paper examines differential multithreading (dMT) as an attractive organization for increasing throughput in simple, small-scale, pipelined processors like those used in embedded environments....
Alloyed Branch History: Combining Global and Local Branch History for Robust Performance (2003)
Zhijian Lu, John Lach, Mircea R. Stan, Kevin Skadron
This paper introduces alloyed prediction, a new two-level predictor organization that combines global and local history in the same structure, combining the advantages of two-level predictors and...
Temperature-aware microarchitecture (2003)
Kevin Skadron, Mircea R. Stan, Karthik Sankaranarayanan, Wei Huang, Sivakumar Velusamy, David Tarjan
With cooling costs rising exponentially, designing cooling solutions for worst-case power dissipation is prohibitively expensive. Chips that can autonomously modify their execution and...
HotLeakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects (2003)
Yan Zhang, Dharmesh Parikh, Karthik Sankaranarayanan, Kevin Skadron, Mircea Stan
This report introduces HotLeakage, an architectural model for subthreshold and gate leakage that we have developed here at the University of Virginia. The most important features of HotLeakage are...
HotLeakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects (2003)
Yan Zhang, Dharmesh Parikh, Karthik Sankaranarayanan, Kevin Skadron, Mircea Stan
This report introduces HotLeakage, an architectural model for subthreshold and gate leakage that we have developed here at the University of Virginia. The most important features of HotLeakage are...
Memory Reference Reuse Latency: (2003)
Accelerated Warmup For, John W. Haskins, Kevin Skadron
This paper proposes to speedup sampled microprocessor simulations by reducing warmup times without sacrificing simulation accuracy. It exploiting the observation that of the memory references that...
Temperature-aware microarchitecture (2003)
Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Tarjan
skadron,siva,karthick,dtarjan¦ With power density and hence cooling costs rising exponentially, processor packaging can no longer be designed for the worst case, and there is an urgent need for...
Hotspot: a dynamic compact thermal model at the processorarchitecture level (2003)
Mircea R. Stan, Kevin Skadron, Marco Barcella, Wei Huang, Karthik Sankaranarayanan, Sivakumar Velusamy
This paper describes a thermal-modeling approach that is easy to use and computationally efficient for modeling thermal effects and thermal-management techniques at the processor architecture level....
Temperature-Aware Microarchitecture (2003)
Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Sankaranarayanan, David Tarjan
With power density and hence cooling costs rising exponentially, processor packaging can no longer be designed for the worst case, and there is an urgent need for runtime processor-level techniques...
Power-aware QoS management in web servers (2003)
Vivek Sharma, Arun Thomas, Tarek Abdelzaher, Kevin Skadron
Power management in data centers has become an increasingly important concern. Large server installations are designed to handle peak load, which may be significantly larger than in off-peak...
Yingmin Li, Kevin Skadron, Mircea R. Stan
This paper provides new insights on how to integrate power-saving techniques by using queue occupancies to dynamically match the power-saving modes of various pipeline stages with the current...
Hotleakage: A temperature-aware model of subthreshold and gate leakage for architects (2003)
Yan Zhang, Dharmesh Parikh, Karthik Sankaranarayanan, Kevin Skadron, Mircea Stan
This report introduces HotLeakage, an architectural model for subthreshold and gate leakage that we have developed here at the University of Virginia. The most important features of HotLeakage are...
Odd/even bus invert with two-phase transfer for buses with coupling (2002)
Yan Zhang, John Lach, Kevin Skadron, Mircea R. Stan
The coupling capacitances between on-chip bus lines become dominant in deep-submicron technologies. Coding to reduce the switching activity of the individual lines was enough to reduce power on buses...
Cache-Conscious Allocation of Pointer-Based Data Structures Revisited with (2002)
Josefin Hallberg, Tuva Palm, Mats Brorsson, Dharmesh Parikh, Yan Zhang, ...
As memory access times continue to be a bottleneck, differential research is required for better understanding of memory access performance. Studies of cache-conscious allocation and software...
Adaptive cache decay using formal feedback control (2002)
Sivakumar Velusamy, Karthik Sankaranarayanan, Dharmesh Parikh, Tarek Abdelzaher, Kevin Skadron
This paper argues that adaptive techniques in processor architecture should be designed using formal feedback-control theory. We use the derivation of a controller for cache decay---a technique for...
Applying decay strategies to branch predictors for leakage energy savings (2002)
Zhigang Hu, Philo Juang, Doug Clark, Kevin Skadron, Margaret Martonosi
This paper shows that substantial reductions in leakage energy can be obtained by deactivating groups of branch-predictor entries if they lie idle for a sufficiently long time. Decay techniques,...
John W. Haskins, Jr. Kevin Skadron, Aj Kleinosowski, David J. Lilja
Copyright c 2002 Detailed execution-driven simulation is an important tool for computer architecture research. It is desirable to drive these simulations with standard benchmark programs that are...
Control-theoretic dynamic frequency and voltage scaling for multimedia workloads (2002)
Zhijian Lu, Jason Hein, Marty Humphrey, Mircea Stan, John Lach, Kevin Skadron
This paper describes a formal feedback-control algorithm for dynamic voltage/frequency scaling (DVS) in a portable multimedia system to save power while maintaining a desired playback rate. Our...
Control-theoretic dynamic frequency and voltage scaling for multimedia workloads (2002)
Zhijian Lu, Jason Hein, Mircea Stan, John Lach, Kevin Skadron
This paper describes a formal feedback-control algorithm for dynamic voltage/frequency scaling (DVS) in a portable multimedia system to save power while maintaining a desired playback rate. Our...
Kevin Skadron, Tarek Abdelzaher, Mircea R. Stan
This paper proposes the use of formal feedback control theory as a way to implement adaptive techniques in the processor architecture. Dynamic thermal management (DTM) is used as a test vehicle, and...
Managing Leakage for Transient Data: Decay and Quasi-Static Memory Cells (2002)
Zhigang Hu, Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Margaret Martonosi, ...
Much of on-chip storage is devoted to transient, often short-lived, data. Despite this, virtually all on-chip array structures use sixtransistor (6T) static RAM cells that store data indefinitely. In...
Kevin Skadron, Tarek Abdelzaher, Mircea R. Stan
This paper proposes the use of formal feedback control theory as a way to implement adaptive techniques in the processor architecture. Dynamic thermal management (DTM) is used as a test vehicle, and...
Power Issues Related to Branch Prediction (2002)
Dharmesh Parikh, Kevin Skadron, Yan Zhang, Marco Barcella, Mircea R. Stan
dharmesh,skadron£ This paper explores the role of branch predictor organization in power/energy/performance tradeoffs for processor design. We find that as a general rule, to reduce overall energy...
Kevin Skadron, Tarek Abdelzaher, Mircea R. Stan
This paper proposes the use of formal feedback control theory as a way to implement adaptive techniques in the processor architecture. Dynamic thermal management (DTM) is used as a test vehicle, and...
Martin Schulz, Bruce Childers, Sally A. Mckee, Martin Schulz, Bruce Childers, Sally A. Mckee, ...
(PACT 2001) includes for the first time a Work-in-Progress session. We received many excellent short abstracts – some of which were wild ideas. From these we chose seven abstracts for presentation,...
HydraScalar: A Multipath-Capable Simulator (2001)
Kevin Skadron, Pritpal S. Ahuja
Even sophisticated branch-prediction techniques necessarily suffer some mispredictions, and even relatively small mispredict rates hurt performance substantially in current-generation processors....
Low-overhead software dynamic translation (2001)
Kevin Scott, Jack W. Davidson, Kevin Skadron
Software dynamic translation (SDT) is a technology that allows programs to be modified as they are running. The overhead of monitoring and modifying a running program’s instructions is often...
Skadron “The Effects of Context Switching on Branch Predictor Performance (2001)
This paper shows that context switching is not a significant factor to be considered when performing general branch prediction studies. Branch prediction allows for speculative execution by...
Skadron “The Effects of Context Switching on Branch Predictor Performance (2001)
This paper shows that context switching is not a significant factor to be considered when performing general branch prediction studies. Branch prediction allows for speculative execution by...
HydraScalar: A Multipath-Capable Simulator (2001)
Kevin Skadron, Pritpal S. Ahuja
Even sophisticated branch-prediction techniques necessarily suffer some mispredictions, and even relatively small mispredict rates hurt performance substantially in current-generation processors....
John W. Haskins, R. Hirst, Kevin Skadron
This paper examines differential multithreading (dMT) as an attractive organization for coping with pipeline stalls in smallscale processors like those used in embedded environments. The paper...
Minimal subset evaluation: Rapid warm-up for simulated hardware state (2001)
John W. Haskins, Jr. Kevin Skadron
This paper introduces minimal subset evaluation (MSE) as a way to reduce time spent on large-structure warm-up during the fastforwarding portion of processor simulations. Warm up is commonly used...
HydraScalar: A Multipath-Capable Simulator (2001)
Kevin Skadron, Pritpal S. Ahuja
Even sophisticated branch-prediction techniques necessarily suffer some mispredictions, and even relatively small mispredict rates hurt performance substantially in current-generation processors....
Bruce Childers, Martin Schulz, Sally Mckee, Bruce Childers, Martin Schulz, Sally A. Mckee, ...
This year's Parallel Architectures and Compilation Techniques (PACT 2001) includes for the first time a Work-In-Progress session. We received many excellent short abstract – some of which were...
TSpec: A Notation for Describing Memory Reference Traces (2000)
Kevin Skadron, Sally A. Mckee, William A. Wulf
Interpreting reference patterns in the output of a processor is complicated by the lack of a succinct notation for humans to use when communicating about them. Since an actual trace is simply an...
A microprocessor survey course: Exploring advanced computer architecture in practice (2000)
A seminar that surveys state-of-the-art microprocessors offers an excellent forum for students to see how computer architecture techniques are employed in practice and for them to gain a detailed...
Caches as Filters: A Framework for the Analysis of Caching Systems (2000)
Dee Weikle, Sally McKee, Kevin Skadron, William Wulf, Wm. A. Wulf
This paper introduces a new analytical framework for analyzing and designing caches. It consists of four major parts: TSpec notation, into which reference traces can be transformed; equivalence...
Path-Based Target Prediction for File System Prefetching (2000)
Prefetching is a well-known technique for mitigating the von Neumann bottleneck. In its most rudimentary form, prefetching simplifies to sequential lookahead. Unfortunately, large classes of...
This paper presents Differential Multithreading (dMT) as an inexpensive way to achieve high throughput from a single-issue architecture. dMT switches among multiple instruction streams in response to...
Kevin Skadron, Margaret Martonosi, Douglas W. Clark
The need for accurate conditional-branch prediction is well known: mispredictions waste large numbers of cycles, inhibit outof -order execution, and waste power on mis-speculated computation. Prior...
TSpec: A Notation for Describing Memory Reference Traces (2000)
Kevin Skadron, Sally A. Mckee, William A. Wulf
Interpreting reference patterns in the output of a processor is complicated by the lack of a succinct notation for humans to use when communicating about them. Since an actual trace is simply an...
BLP: Applying ILP Techniques to Bytecode Execution (2000)
The popularity of Java has resulted in a flurry of engineering and research activity to improve performance of Java Virtual Machine (JVM) implementations. This paper explores the concept of...
BLP: Applying ILP Techniques to Bytecode Execution (2000)
. The popularity of Java has resulted in a flurry of engineering and research activity to improve performance of Java Virtual Machine (JVM) implementations. This paper introduces the concept of...
Caches as Filters: A Unifying Model for Memory Hierarchy Analysis (2000)
Kevin Skadron, Sally A. Mckee, William A. Wulf
This paper outlines the new caches-as-filters framework for the analysis of caching systems, describing the functional filter model in detail. This model is more general than those introduced...
Speculative Updates of Local and Global Branch History: (2000)
Quantitative Analysis Kevin, Kevin Skadron, Margaret Martonosi, Douglas W. Clark
In today's wide-issue processors, even small branch-misprediction rates introduce substantial performance penalties. Worse yet, inadequate branch prediction creates a bottleneck at the fetch...
BLP: Applying ILP Techniques to Bytecode Execution (2000)
Kevin Scott And, Kevin Scott, Kevin Skadron
The popularity of Java has resulted in a flurry of engineering and research activity to improve performance of Java Virtual Machine (JVM) implementations. This paper explores the concept of...
Kevin Skadron, Margaret Martonosi, Douglas W. Clark
The need for accurate conditional-branch prediction is well known: mispredictions waste large numbers of cycles, inhibit outof-order execution, and waste power on mis-speculated computation. Prior...
Caches As Filters: A Framework for the Analysis of Caching Systems (2000)
Sally A. Mckee, Kevin Skadron, Wm. A. Wulf
This paper introduces a new analytical framework for analyzing and designing caches. It consists of four major parts: TSpec notation, into which reference traces can be transformed; equivalence...
Kevin Skadron, Sally A. Mckee, William A. Wulf
This paper outlines the new caches-as-filters framework for the analysis of caching systems, describing the functional filter model in detail. This model is more general than those introduced...
Kevin Skadron, Pritpal S. Ahuja, Margaret Martonosi, Douglas W. Clark
Design parameters interact in complex ways in modern processors, especially because out-of-order issue and decoupling buffers allow latencies to be overlapped. Tradeoffs among instruction-window...
Alloying Global and Local Branch History: Taxonomy, Performance, and Analysis (1999)
Kevin Skadron, Margaret Martonosi, Douglas W. Clark
The need for accurate conditional-branch prediction is well known: mispredictions waste large numbers of cycles and also waste power on mis-speculated computation. A number of studies have explored...
Kevin Skadron, Pritpal S. Ahuja, Margaret Martonosi, Douglas W. Clark
Design parameters interact in complex ways in modern processors, especially because out-of-order issue and decoupling buffers allow latencies to be overlapped. Tradeoffs among instruction-window...
Characterizing and Removing Branch Mispredictions (1999)
Control-flow mispredictions are a profound impediment to processor performance, because each misprediction introduces a pipeline bubble of many cycles' duration. For example, the minimum bubble...
Selecting a Single, Representative Sample for Accurate Simulation of SPECint Benchmarks (1999)
Kevin Skadron, Margaret Martonosi, Douglas W. Clark
Detailed micro-architecture studies often require time-consuming, cycle-accurate simulation. Unfortunately, many benchmarks of interest, like the SPEC benchmarks, run for tens of billions of...
Alloyed Global and Local Branch History: A Robust Solution to Wrong-History Mispredictions (1999)
Kevin Skadron, Margaret Martonosi, Douglas W. Clark
The need for accurate conditional-branch prediction is well known: mispredictions waste large numbers of cycles, inhibit out-of-order execution, and waste power on mis-speculated computation. Prior...
Kevin Skadron, Pritpal S. Ahuja, Margaret Martonosi, Senior Member, Douglas W. Clark
Abstract-Design parameters interact in complex ways in modern processors, especially because out-of-order issue and decoupling buffers allow latencies to be overlapped. Trade-offs among...
Characterizing and Removing Branch (1999)
Control-flow mispredictions are a profound impediment to processor performance, because each misprediction introduces a pipeline bubble of many cycles ’ duration. For example, the minimum bubble in...
Microarchitectural Floorplanning for Thermal Management: A Technical Report (1998)
Sankaranarayanan, Karthik, Velusamy, Sivakumar, Skadron, Kevin, Stan, Mircea
In current day microprocessors, exponentially increasing power densities, leakage, cooling costs, and reliability concerns have resulted in temperature becoming a first class design constraint like...
Speculative Updates of Local and Global Branch History: A Quantitative Analysis (1998)
Kevin Skadron, Margaret Martonosi, Douglas W. Clark
In today's wide-issue processors, even small branch-misprediction rates introduce substantial performance penalties. Worse yet, inadequate branch prediction creates a bottleneck at the fetch...
Improving Prediction for Procedure Returns with Return-Address-Stack Repair Mechanisms (1998)
Kevin Skadron Pritpal, Kevin Skadron, Pritpal S. Ahuja, Margaret Martonosi, Douglas W. Clark
This paper evaluates several mechanisms for repairing the return-address stack after branch mispredictions. The return-address stack is a small but important structure for achieving better...
Improving Prediction for Procedure Returns with Return-Address-Stack Repair Mechanisms (1998)
Kevin Skadron Pritpal, Kevin Skadron, Pritpal S. Ahuja, Margaret Martonosi, Douglas W. Clark
This paper evaluates several mechanisms for repairing the return-address stack after branch mispredictions. The return-address stack is a small but important structure for achieving better...
Multipath Execution: Opportunities and Limits (1998)
Pritpal S. Ahuja, Kevin Skadron, Margaret Martonosi, Douglas W. Clark
Even sophisticated branch-prediction techniques necessarily suffer some mispredictions, and even relatively small mispredict rates hurt performance substantially in current-generation processors. In...
Improving Prediction for Procedure Returns with Return-Address-Stack Repair Mechanisms (1998)
Kevin Skadron, Pritpal S. Ahuja, Margaret Martonosi, Douglas W. Clark
This paper evaluates several mechanisms for repairing the return-address stack after branch mispredictions. The return-address stack is a small but important structure for achieving better...
Improving Prediction for Procedure Returns with Return-Address-Stack Repair Mechanisms (1998)
Kevin Skadron, Pritpal S. Ahuja, Margaret Martonosi, Douglas W. Clark
This paper evaluates several mechanisms for repairing the return-address stack after branch mispredictions. The return-address stack is a small but important structure for achieving better...
Design Issues and Tradeoffs for Write Buffers (1997)
Kevin Skadron, Douglas W. Clark
Processors with write-through caches typically require a write buffer to hide the write latency to the next level of memory hierarchy and to reduce write traffic. A write buffer can cause processor...
Design issues and tradeoffs for write buffers (1997)
Kevin Skadron, Douglas W. Clark
Processors with write-through caches typically require a write buffer to hide the write latency to the next level of memory hierarchy and to reduce write trajgic. A write buffer can cause processor...
Advisor Prof, Kevin Skadron, Co-advisor Prof, Mircea Stan, Chennai India
An industrial research and development position in the areas of computer architecture and its allied disciplines. My current expertise includes power- and thermal-aware modeling and management of...