Luca Benini

Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems (2009)

Rana, Vincenzo, Murali, Srinivasan, Atienza, David, Santambrogio, Marco D., Sciuto, Donatella, Benini, Luca

Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhanced support for...

Multicore Thermal Management with Model Predictive Control (2009)

Zanini, Francesco, Atienza, David, Benini, Luca, De Micheli, Giovanni

The goal of thermal management is to meet maximum operating temperature constraints, while at the same time tracking timevarying performance requirements. Current approaches avoid thermal violations...

Thermal Balancing Policy for Multiprocessor Stream Computing Platforms (2009)

Mulas, Fabrizio, Atienza, David, Acquaviva, Andrea, Carta, Salvatore, Benini, Luca, De Micheli, Giovanni

Die-temperature control to avoid hotspots is increasingly critical in Multiprocessor System-on-Chip (MPSoCs) for stream computing. In this context, thermal balancing policies based on task migration...

Research Article Area and Power Modeling for Networks-on-Chip with Layout Awareness (2008)

Paolo Meloni, Igor Loi, Federico Angiolini, Salvatore Carta, Massimo Barbaro, Luigi Raffo, ...

Networks-on-Chip (NoCs) are emerging as scalable interconnection architectures, designed to support the increasing amount of cores that are integrated onto a silicon die. Compared to traditional...

Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support (2008)

Francesco Poletti, Antonio Poggiali, Davide Bertozzi, Luca Benini, Pol Marchal, Mirko Loghi, ...

Abstract—In today’s multiprocessor SoCs (MPSoCs), parallel programming models are needed to fully exploit hardware capabilities programming models onto tightly power-constrained hardware...

Supporting Vertical Links for 3D Networks-on-Chip: Toward an Automated Design and Analysis Flow (2008)

Igor Loi, Federico Angiolini, Luca Benini

Abstract — Three-dimensional (3D) manufacturing technologies are viewed as promising solutions to the bandwidth bottlenecks in VLSI communication. At the architectural level, Networkson-chip (NoCs)...

ABSTRACT Powering Networks on Chips Energy-efficient and reliable interconnect design for SoCs (2008)

Luca Benini

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NoC Design and Implementation in 65nm Technology (2008)

Antonio Pullini, Federico Angiolini, Paolo Meloni, David Atienza, Srinivasan Murali, Luigi Raffo, ...

As embedded computing evolves towards ever more powerful architectures, the challenge of properly interconnecting large numbers of on-chip computation blocks is becoming prominent. Networks-on-Chip...

Improving Java Performance Using Dynamic Method Migration on FPGAs (2008)

Emanuele Lattanzi, Mahmuth Kandemir, Luca Benini

With the diffusion of Java in advanced multimedia mobile devices, there is a growing need for speeding up the execution of Java Bytecode beyond the limits of traditional interpreters and just-in-time...

Copyright © 2005 Inderscience Enterprises Ltd. Improving Java performance using dynamic method migration on (2008)

Emanuele Lattanzi, Aman Gayasen, Mahmut K, Luca Benini, Alessandro Bogliolo

Abstract: With the diffusion of Java in advanced multimedia mobile devices, there is a growing need for speeding up the execution of Java bytecode beyond the limits of traditional interpreters and...

ABSTRACT Polynomial-Time Algorithm for On-Chip Scratchpad Memory Partitioning (2008)

Federico Angiolini, Luca Benini, Alberto Caprara

Focusing on embedded applications, scratchpad memories (SPMs) look like a best-compromise solution when taking into account performance, energy consumption and die area. The main challenge in SPM...

Measuring Efficiency and Executability of allocation and scheduling in Multi-Processor Systems-on-Chip (2008)

Luca Benini, Davide Bertozzi, Alessio Guerri, Michela Milano, Francesco Poletti

Multi-Processor Systems-on-Chips (MPSoCs) are becoming increasingly complex, and mapping and scheduling of multi-task applications on computational units is key to meeting performance constraints and...

HW-SW Emulation Framework for Temperature-Aware Design in MPSoCs (2008)

David Atienza, Pablo G. Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, ...

New tendencies envisage multiprocessor systems-on-chips (MPSoCs) as a promising solution for the consumer electronics market. MPSoCs are complex to design, as they must execute multiple applications...

Application of FPGA Emulation to SoC Floorplan and Packaging Exploration (2008)

Pablo G. Del Valle, David Atienza, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, ...

Abstract — New tendencies in the consumer electronics market present Multi-Processor Systems-On-Chip (MPSoCs) as a promising solution for meeting the processing demands of upcoming generations of...

Abstract Cycle-Accurate Simulation of Energy Consumption in Embedded Systems (2008)

Tajana Simunic, Luca Benini, Giovanni De Micheli

This paper presents a methodology for cycle-accurate simulation of energy dissipation in embedded systems. The ARM Ltd. [1] instruction-level cycle-accurate simulator is extended with energy models...

Dynamic Power Management of Electronic Circuits and Systems (2008)

Luca Benini, Giovanni De Micheli

Abstract- Dynamic power management is a design methodology aiming at controlling performance and power levels of digital circuits and systems, with the goal of extending the autonomous operation time...

Timing-Error-Tolerant Network-on-Chip Design Methodology (2008)

Rutuparna Tamhankar, Srinivasan Murali, Student Member, Stergios Stergiou, Antonio Pullini, Federico Angiolini, ...

Abstract—With technology scaling, the wire delay as a fraction of the total delay is increasing, and the communication architecture is becoming a major bottleneck for system performance in systems...

Synthesis of Predictable Networks-on-Chip-Based Interconnect Architectures for Chip Multiprocessors (2008)

Srinivasan Murali, Student Member, David Atienza, Paolo Meloni, Salvatore Carta, Luca Benini, ...

Abstract—Today, chip multiprocessors (CMPs) that accommodate multiple processor cores on the same chip have become a reality. As the communication complexity of such multicore systems is rapidly...

This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. An Application-Specific Design Methodology for On-Chip Crossbar Generation (2008)

Srinivasan Murali, Luca Benini, Giovanni De Micheli

Abstract — Designing a power efficient interconnection architecture for Multi-processor Systems on Chips (MPSoCs), satisfying the application performance constraints is a non-trivial task. In order...

3dID: a low-power, low-cost hand motion capture device (2008)

Michele Sama, Vincenzo Pacella, Elisabetta Farella, Luca Benini, Bruno Riccó

This paper presents a novel input device design for capturing gestures. The system is based on commodity components and combines accelerometers, gyroscopes and bend sensors. It is a low-power,...

Communication-Aware Stochastic Allocation and Scheduling Framework for Conditional Task Graphs in Multi-Processor Systems-on-Chip (2008)

Emiliano Dolif, Michele Lombardi, Martino Ruggiero, Michela Milano, Luca Benini

The increasing levels of system integration in Multi-Processor System-on-Chips (MPSoCs) emphasize the need for new design flows for efficient mapping of multi-task applications onto hardware...

NoC Design and Implementation in 65nm Technology (2008)

Antonio Pullini, Federico Angiolini, Paolo Meloni, David Atienza, Srinivasan Murali, Luigi Raffo, ...

As embedded computing evolves towards ever more powerful architectures, the challenge of properly interconnecting large numbers of on-chip computation blocks is becoming prominent. Networks-on-Chip...

Paradigm (2008)

Luca Benini, De Micheli, A New Soc

On-chip micronetworks, designed with a layered methodology, will meet the distinctive challenges of providing functionally correct, reliable operation of interacting system-on-chip components....

Abstract System-Level Power Optimization: Techniques and Tools (2008)

Luca Benini, Giovanni De Michelit

This tutorial presents a cohesive view of power-conscious system-level design. We consider systems as consisting of a hardware platform executing software programs. We ad-dress the problems of power...

A Multiprocessor System-on-Chip for Real-Time Biomedical Monitoring and Analysis: ECG Prototype Architectural Design Space Exploration (2008)

Iyad Al Khatib, Francesco Poletti, Davide Bertozzi, Luca Benini, Axel Jantsch

In this paper we focus on multiprocessor system-on-chip (MPSoC) architectures for human heart Electrocardiogram (ECG) real-time analysis as a Hardware/Software (HW/SW) platform offering an advance...

Hardware/Software Architecture for Real-Time ECG Monitoring and Analysis Leveraging MPSoC Technology (2008)

Iyad Al Khatib, Davide Bertozzi, Francesco Poletti, Luca Benini, Axel Jantsch, Mohamed Bechara, ...

Abstract. The interest in high performance chip architectures for biomedical applications is gaining a lot of research and market interest. Heart diseases remain by far the main cause of death and a...

Paradigm (2008)

Luca Benini, De Micheli, A New Soc

On-chip micronetworks, designed with a layered methodology, will meet the distinctive challenges of providing functionally correct, reliable operation of interacting system-on-chip components....

Multi-modal Video Surveillance Aided by Pyroelectric Infrared Sensors (2008)

Magno, Michele, Tombari, Federico, Brunelli, Davide, Di Stefano, Luigi, Benini, Luca

The interest in low-cost and small size video surveillance systems able to collaborate in a network has been increasing over the last years. Thanks to the progress in low-power design, research has...

Multi-modal Video Surveillance Aided by Pyroelectric Infrared Sensors (2008)

Magno, Michele, Tombari, Federico, Brunelli, Davide, Di Stefano, Luigi, Benini, Luca

The interest in low-cost and small size video surveillance systems able to collaborate in a network has been increasing over the last years. Thanks to the progress in low-power design, research has...

TOM: enhancement and extension of a tool suite for in silico approaches to multigenic hereditary disorders (2008)

Masotti, Daniele, Nardini, Christine, Rossi, Simona, Bonora, Elena, Romeo, Giovanni, Volinia, Stefano, ...

Summary: The study of complex hereditary diseases is a very challenging area of research. The expanding set of in silico approaches offers a flourishing ground for the acceleration of meaningful...

Real-Time High-Sensitivity Impedance Measurement Interface for Tethered BLM Biosensor Arrays (2008)

Temiz, Yuksel, K. Gurkaynak, Frank, Terrettaz, Samuel, Vogel, Horst, De Micheli, Giovanni, Leblebici, Yusuf, ...

This paper presents a switched-capacitor (SC) current integrator circuit for impedance measurement of tethered bilayer lipid membrane (tBLM) biosensors. The circuit comprises a small number of high...

In-Place Power Optimization for LUT-Based FPGAs (2007)

Balakrishna Kumthekar, Luca Benini, Fabio Somenzi, Enrico Macii, Enrico Macii

In this paper, we propose a technique to perform power-oriented re-configuration of a system implemented using LUT-based FPGAs. The main features of our approach are: Aggressive exploitation of...

Chapter #16 Energy-efficient system-level design (2007)

Luca Benini, Giovanni De Micheli

Abstract: The complexity of current and future integrated systems requires a paradigm shift towards component-based design techno logies that enable the integration of large computational cores,...

PPP: A Gate-Level Power Simulator AWorld Wide Web Application (2007)

Giovanni De Micheli, Bruno Ricco, Alessandro Bogliolo, Alessandro Bogliolo, Luca Benini, Luca Benini, ...

Power consumption is an increasingly important constraint for complex ICs. Accurate and e cient power estimations are required at any level of abstraction to steer the design process. PPP is a...

A Multilevel Engine for Fast Power Simulation of Realistic Input Streams (2007)

Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi

Abstract—Power estimation for validation and sign-off is a critical step in the design process. In this phase, accuracy is a key requirement, but there are hard constraints on the time that can be...

Synthesis of Power-Managed Sequential Components Based on Computational Kernel Extraction (2007)

Luca Benini, Giovanni De Micheli, Antonio Lioy, Enrico Macii, Senior Member, Massimo Poncino

Abstract—This paper introduces a power optimization paradigm for sequential components based on the concept of computational kernel, a highly simplified logic block whose behavior mimics the...

ABSTRACT Powering Networks on Chips Energy-efficient and reliable interconnect design for SoCs (2007)

Luca Benini

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AUTOMATED DNA CURVATURE PROFILE RECONSTRUCTION IN ATOMIC FORCE MICROSCOPE IMAGES (2007)

Elisa Ficarra, Daniele Masotti, Luca Benini, Michela Milano

An automated algorithm is presented to determine the DNA molecule intrinsic curvature profiles and the molecular spatial orientations in Atomic Force Microscope images. The curvature is composed by...

y (2007)

Tajana Simunic, Luca Benini, Andrea Acquaviva, Peter Glynn, Giovanni De Micheli

Portable systems require long battery lifetime while still delivering high performance. Dynamic voltage scaling (DVS) algorithms reduce energy consumption by changing processor speed and voltage at...

Energy-Ecient Design of Battery-Powered Embedded Systems (2007)

Tajana Simunic Luca, Luca Benini, Giovanni De Micheli

Energy-e#cient design of battery-powered embedded systems demands optimizations in both hardware and software. In this work we leverage cycle-accurate energy consumption models to explore compiler...

Improving the fault tolerance of nanometric PLA designs (2007)

Federico Angiolini, M. Haykel, Ben Jamaa, David Atienza, Luca Benini, Giovanni De Micheli

Several alternative building blocks have been proposed to replace planar transistors, among which a prominent spot belongs to nanometric filaments such as Silicon NanoWires (SiNWs) and Carbon...

07041 Summary -- Power-aware Computing Systems (2007)

Benini, Luca, Chang, Naehyuck, Kremer, Ulrich, Probst, Christian W.

The program of the Dagstuhl seminar 07041 on Power-aware Computing Systems featured presentations of about 25 participating researchers from academia and industry. They were chosen to represent major...

07041 Abstracts Collection -- Power-aware Computing Systems (2007)

Benini, Luca, Chang, Naehyuck, Kremer, Ulrich, Probst, Christian W.

From January 21, 2007 to January 26, 2007, the Dagstuhl Seminar 07041``Power-aware Computing Systems'' was held in the International Conference and Research Center (IBFI), Schloss Dagstuhl. During...

A Method for Routing Packets Across Multiple Paths in NoCs with In-Order Delivery and Fault-Tolerance Gaurantees (2007)

Srinivasan Murali, David Atienza, Luca Benini, Giovanni De Micheli

Networks on Chips (NoCs) are required to tackle the increasing delay and poor scalability issues of bus-based communication architectures. Many of today's NoC designs are based on single path...

Area and Power Modeling for Networks-on-Chip with Layout Awareness (2007)

Paolo Meloni, Igor Loi, Federico Angiolini, Salvatore Carta, Massimo Barbaro, Luigi Raffo, ...

Networks-on-Chip (NoCs) are emerging as scalable interconnection architectures, designed to support the increasing amount of cores that are integrated onto a silicon die. Compared to traditional...

MOCA: A Low-Power, Low-Cost Motion Capture System Based on Integrated Accelerometers (2007)

Elisabetta Farella, Luca Benini, Bruno Riccò, Andrea Acquaviva

Human-computer interaction (HCI) and virtual reality applications pose the challenge of enabling real-time interfaces for natural interaction. Gesture recognition based on body-mounted accelerometers...

Interface Layering Phenomena in Capacitance Detection of DNA with Biochips (2007)

Carrara, Sandro, Gürkaynak, Frank K., Guiducci, Carlotta, Stagni, Claudio, Benini, Luca, Leblebici, Yusuf, ...

Reliable DNA detection is of great importance for the development of the Lab-on-chip technology. The effort of the most recent projects on this field is to integrate all necessary operations, such as...

Allocation, scheduling and voltage scaling on energy aware mpsocs (2006)

Luca Benini, Davide Bertozzi, Alessio Guerri, Michela Milano

Abstract. In this paper we introduce a complex allocation and scheduling problem for variable voltage Multi-Processor System-on-Chip (MP-SoC) platforms. We propose a methodology to formulate and...

A Cooperative, Accurate Solving Framework for Optimal Allocation, Scheduling and Frequency Selection on Energy-Efficient MPSoCs (2006)

Martino Ruggiero, Pari Gioia, Guerri Alessio, Luca Benini, Milano Michela, Davide Bertozzi, ...

Most problems addressed by the software optimization flow for multi-processor systems-on-chip (MPSoCs) are NP-complete, and have been traditionally tackled by means of heuristics and highlevel...

An Integrated Open Framework for Heterogeneous MPSoC Design Space Exploration (2006)

Federico Angiolini, Jianjiang Ceng, Rainer Leupers, Federico Ferrari, Cesare Ferri, Luca Benini

In recent years, increasing manufacturing density has allowed the development of Multi-Processor Systems-on-Chip (MPSoCs). Application-Specific Instruction Set Processors (ASIPs) stand out as one of...

Designing application-specific networks on chips with floorplan information (2006)

Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Luca Benini, Giovanni De Micheli, ...

With increasing communication demands of processor and memory cores in Systems on Chips (SoCs), scalable Networks on Chips (NoCs) are needed to interconnect the cores. For the use of NoCs to be...

Allocation, scheduling and voltage scaling on energy aware mpsocs (2006)

Luca Benini, Luca Benini, Davide Bertozzi, Davide Bertozzi, Alessio Guerri, Alessio Guerri, ...

Abstract. In this paper we introduce a complex allocation and scheduling problem for variable voltage Multi-Processor System-on-Chip (MPSoC) platforms. We propose a methodology to formulate and solve...

A multi-path routing strategy with guaranteed in-order packet delivery and fault-tolerance for networks on chip (2006)

Srinivasan Murali, David Atienza, Luca Benini, Giovanni De Micheli

In this work we present a multi-path routing strategy that guarantees in-order packet delivery for Networks on Chips (NoCs). We present a design methodology that uses the routing strategy to...

Designing application-specific networks on chips with floorplan information (2006)

Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Luca Benini, Giovanni De Micheli, ...

With increasing communication demands of processor and memory cores in Systems on Chips (SoCs), scalable Networks on Chips (NoCs) are needed to interconnect the cores. For the use of NoCs to be...

TOM: a web-based integrated approach for identification of candidate disease genes (2006)

Rossi, Simona, Masotti, Daniele, Nardini, Christine, Bonora, Elena, Romeo, Giovanni, Macii, Enrico, ...

The massive production of biological data by means of highly parallel devices like microarrays for gene expression has paved the way to new possible approaches in molecular genetics. Among them the...

Hardware-Software Design of a Smart Sensor for Fully-Electronic DNA Hybridization Detection (2005)

Stagni, Claudio, Guiducci, Carlotta, Lanzoni, Massimo, Benini, Luca, Ricco, Bruno

This paper describes the design of a smart sensor for label-free detection of DNA hybridization. The sensor is based on a direct electrical transduction principle: it measures impedance variation at...

Allocation and scheduling for mpsocs via decomposition and no-good generation (2005)

Luca Benini, Davide Bertozzi, Alessio Guerri, Michela Milano

This paper proposes a decomposition approach to the allocation and scheduling of a multi-task application on a multiprocessor system-on-chip (MPSoCs) [Wolf, 2004]. This is currently one of the most...

NoC synthesis flow for customized domain specific multiprocessor Systems-on-Chip (2005)

Davide Bertozzi, Antoine Jalabert, Srinivasan Murali, Student Member, Rutuparna Tamhankar, Student Member, ...

Abstract—The growing complexity of customizable single-chip multiprocessors is requiring communication resources that can only be provided by a highly-scalable communication infrastructure. This...

Analysis of error recovery schemes for networks on chips (2005)

Srinivasan Murali, Theocharis Theocharides, Luca Benini, Giovanni De Micheli, N. Vijaykrishnan, Mary Jane Irwin

Network on Chip (NoC) interconnects based on packet-switched communication have been recently proposed for providing scalable and reliable on-chip communication. Due to shrinking transistor sizes and...

Allocation and Scheduling for MPSoCs via decomposition and no-good generation (2005)

Mpsocs Via Decomposition, Luca Benini, Davide Bertozzi, Alessio Guerri, Michela Milano, Luca Benini, ...

Abstract. This paper describes an efficient, complete approach for solving a complex allocation and scheduling problem for Multi-Processor System-on-Chip (MPSoC). Given a throughput constraint for a...

Allocation and scheduling for mpsocs via decomposition and no-good generation (2005)

Luca Benini, Davide Bertozzi, Alessio Guerri, Michela Milano

Abstract. This paper describes an efficient, complete approach for solving a complex allocation and scheduling problem for Multi-Processor System-on-Chip (MPSoC). Given a throughput constraint for a...

05141 Summary -- Power-aware Computing Systems (2005)

Benini, Luca, Kremer, Ulrich, Probst, Christian W., Schelkens, Peter

This paper summarizes the objectives and structure of a seminar with the same title, held from April 3rd to April 8th 2005 at Schloss Dagstuhl, Germany.

05141 Abstracts Collection -- Power-aware Computing Systems (2005)

Benini, Luca, Kremer, Ulrich, Probst, Christian W., Schelkens, Peter

From 03.04.05 to 08.04.05, the Dagstuhl Seminar 05141 ``Power-aware Computing Systems'' was held in the International Conference and Research Center (IBFI), Schloss Dagstuhl. During the seminar,...

A post-compiler approach to scratchpad mapping of code (2004)

Federico Angiolini, Francesco Menichelli, Alberto Ferrero, Luca Benini, Mauro Olivieri

ScratchPad Memories (SPMs) are commonly used in embedded systems because they are more energy-efficient than caches and enable tighter application control on the memory hierarchy. Optimally mapping...

Analyzing On-Chip Communication in a MPSoC Environment (2004)

Mirko Loghi, Federico Angiolini, Roberto Zafalon, Davide Bertozzi, Luca Benini

This work focuses on communication architecture analysis for multi-processor Systems-on-Chips (MPSoCs), and it leverages a SystemC-based platform to simulate a complete multi-processor system at the...

R.Zafalon. Scalability analysis of evolving SoC interconnect protocols (2004)

Martino Ruggiero, Federico Angiolini, Francesco Poletti, Davide Bertozzi, Luca Benini, Roberto Zafalon

To face evolving communication requirements in Systemon-Chip (SoC) designs, interconnect fabric capabilities can be improved by adopting new topologies or new protocols. This paper will focus on the...

Specification and Analysis of Power-Managed System (2004)

Alessandro Bogliolo, Luca Benini, Emanuele Lattanzi, Giovanni De Micheli

Dynamic power management encompasses several techniques for reducing energy dissipation in electronic systems by selective slowdown or shutdown of components. We present a theoretical framework for...

Pipescompiler: A tool for instantiating application specific networks on chip (2004)

Antoine Jalabert, Srinivasan Murali, Luca Benini, Giovanni De Micheli

Future Systems on Chips (SoCs) will integrate a large number of processor and storage cores onto a single chip and require Networks on Chip (NoC) to support the heavy communication demands of the...

Scaling into Ambient Intelligence (2003)

Twan Basten, Luca Benini, Anantha Ch, Menno Lindwer, Jie Liu, Rex Min, ...

Envision the situation that high quality information and entertainment is easily accessible to anyone, anywhere, at any time, and on any device. How realistic is this vision? And what does it require...

Scaling into Ambient Intelligence (2003)

Twan Basten, Luca Benini, Anantha Ch, Menno Lindwer, Jie Liu, Rex Min, ...

Envision the situation that high quality information and entertainment is easily accessible to anyone, anywhere, at any time, and on any device. How realistic is this vision? And what does it require...

Packetized On-Chip Interconnect Communication Analysis for MPSoC (2003)

Terry Tao Ye, Luca Benini, Giovanni De Micheli

Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the packet dataflows that...

Transport Protocol Optimization For Energy (2003)

Efficient Wireless Embedded, Davide Bertozzi, Luca Benini, Srivaths Ravi

For wireless embedded systems, the power consumption in the network interface (radio) plays a dominant role in determining battery life. In this paper, we explore transport protocol optimizations for...

Scaling into Ambient Intelligence (2003)

Twan Basten Luca, Luca Benini, Anantha Ch, Menno Lindwer, Jie Liu, Rex Min, ...

Envision the situation that high quality information and entertainment is easily accessible to anyone, anywhere, at any time, and on any device. How realistic is this vision? And what does it require...

Transport Protocol Optimization For Energy (2003)

Efficient Wireless Embedded, Davide Bertozzi, Luca Benini, Srivaths Ravi

For wireless embedded systems, the power consumption in the network interface (radio) plays a dominant role in determining battery life. In this paper, we explore transport protocol optimizations for...

Abstract (2003)

Andrea Acquaviva, Tajana Simunic, Luca Benini, Tajana Simunic, Luca Benini

low-power, operating system, application driven In this report we present an energy efficient implementation of a commercial-strength operating system (ECOS) running on a reallife hardware platform...

Packetized On-Chip Interconnect Communication Analysis for MPSoC (2003)

Terry Tao Ye, Luca Benini, Giovanni De Micheli

Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the packet dataflows that...

Multi-client cooperation and wireless pda interaction in immersive virtual environment (2003)

Elisabetta Farella, Davide Brunelli, Luca Benini

application, Real-Time Interactive System Virtual Environments (VEs) present many advantages for Collaborative Work. Users are immersed in simulation reproducing real world situation, thanks to...

Palmtop Computers for Managing Interaction with Immersive Virtual Heritage (2002)

Luca Benini, Maria Elena Bonfigli, Luigi Calori, Elisabetta Farella, Bruno Riccò

The paper aims at exploring the potential of using portable devices in managing interaction in (semi)Immersive Virtual Reality (IVR) systems reconstructing cultural heritage objects and environments....

Networks on chip: a new paradigm for systems on chip design (2002)

Luca Benini

This paper is meant to be a short introduction to a new paradigm for systems on chip (SoC) design. We refer the interested reader to an extended overview of this problem [1] and to some recent...

Networks on chip: a new paradigm for systems on chip design (2002)

Luca Benini

This paper is meant to be a short introduction to a new paradigm for systems on chip (SoC) design. We refer the interested reader to an extended overview of this problem [1] and to some recent...

Hardware-Assisted Data Compression for Energy Minimization in Systems with Embedded Processors (2002)

Luca Benini, Davide Bruni, Alberto Macii, Enrico Macii

In this paper, we suggest hardware-assisted data compression asatool for reducing energy consumption of core-based embedded systems. We propose a novel and e cient architecture for on-the- y data...

Hardware-Assisted Data Compression for Energy Minimization in Systems with Embedded Processors (2002)

Luca Benini, Davide Bruni, Alberto Macii, Enrico Macii

In this paper, we suggest hardware-assisted datacompression asatool for reducing energy consumption of core-based embedded systems. We propose a novel and e cient architecture for on-the- y data...

Power-Aware Operating Systems for Interactive Systems (2002)

Yung-hsiang Lu, Luca Benini, Giovanni De Micheli

Abstract—Many portable systems deploy operating systems (OS) to support versatile functionality and to manage resources, including power. This paper presents a new approach for using OS to reduce...

Value-based Source Code Specialization for Energy Reduction (2002)

Eui-Young Chung, Giovanni De Micheli, Marco Carill, Luca Benini, Gabriele Luculli

this paper presents algorithms and a tool flow to reduce the computational effort of programs,using value profiling and partial evaluation.Such a reduction translates into both energy savings and...

Dynamic Frequency Scaling with Buffer Insertion for Mixed Workloads (2002)

Yung-Hsiang Lu, Luca Benini, Giovanni De Micheli

This paper presents a method to reduce the energy of interactive systems for mixed workloads: multimedia applications that require constant output rates and sporadic jobs that need prompt responses....

Value-Sensitive Automatic Code Specialization Embedded Software (2002)

Eui-Young Chung, Student Member, Luca Benini, Giovanni Demicheli, Gabriele Luculli, Marco Carilli

The objective of this work is to create a framework for the optimization of embedded software. We present algorithms and a tool flow to reduce the computational effort of programs, using value...

Chapter 1 LOGIC SYNTHESIS FOR LOW POWER (2002)

Logic Synthesis For, Luca Benini, Giovanni De Micheli

Energy-e#cient design of integrated circuits requires specialized tools and technologies. This chapter surveys some of the most important contributions in logic synthesis for achieving low-power...

Event-driven power management (2001)

Luca Benini, Peter Glynn, Giovanni De Micheli

Abstract—Energy consumption of electronic devices has become a serious concern in recent years. Power management (PM) algorithms aim at reducing energy consumption at the system-level by...

Designing low-power circuits: practical recipes (2001)

Luca Benini, Giovanni De Micheli, Enrico Macii

Abstract—The growing market of mobile, battery-powered electronic systems (e.g., cellular phones, personal digital assistants, etc.) demands the design of microelectronic circuits with low power...

An Adaptive Algorithm for Low-Power Streaming Multimedia Processing (2001)

Andrea Acquaviva, Luca Benini, Bruno Ricco

This paper addresses the problem of power consumption in multimedia system architectures and presents an algorithmic optimization technique to achieve the goal of power reduction in the context of...

Software-controlled processor speed setting for low-power streaming multimedia (2001)

Andrea Acquaviva, Luca Benini, Bruno Riccó, Senior Member

Abstract—In this paper, we describe a software-controlled approach for adaptively minimizing energy in embedded systems for real-time multimedia processing. Energy is optimized by clock speed...

Cached-code compression for energy minimization in embedded processors (2001)

Luca Benini, Alberto Macii, Alberto Nannarelli

This paper contributes a novel approach for reducing static code size and instruction fetch energy for cache-based core processors running embedded applications. Our irnplemen-tation of the...

Dynamic Voltage Scaling and Power Management for Portable Systems (2001)

Tajana Simunic, Luca Benini

Portable systems require long battery lifetime while still delivering high performance. Dynamic voltage scaling (DVS) algorithms reduce energy consumption by changing processor speed and voltage at...

Energy-Efficient Design of Battery-Powered Embedded Systems (2001)

Tajana Simunic, Student Member, Luca Benini, Giovanni De Micheli

Energy-efficient design of battery-powered systems demands optimizations in both hardware and software. We present a modular approach for enhancing instruction level simulators with cycle-accurate...

Area and timing models for ptl macrocells (2001)

Luca Benini, Luca Macchiarulo, Enrico Macii

Abstract. PTL represents a viable alternative to standard CMOS for the implementation of specific units in performance-constrained systems. Unfortunately, this design style has not found wide...

Automatic Source Code Specialization for Energy Reduction (2001)

Eui-Young Chung, Luca Benini, Giovanni De Micheli

This paper presents a framework to reduce the computational eort of software programs, using value pro ling and partial evaluation. Our tool reduces computational eort by specializing a program for...

Event-driven power management (2001)

Luca Benini, Peter Glynn, Giovanni De Micheli

Energy consumption of electronic devices has become a serious concern in recent years. Power management (PM) algorithms aim at reducing energy consumption at the system-level by selectively placing...

An Adaptive Algorithm for Low-Power Streaming Multimedia Processing (2001)

Andrea Acquaviva, Luca Benini, Bruno Ricco

This paper addresses the problem of power consumption in multimedia system architectures and presents an algorithmic optimization technique to achieve the goal of power reduction in the context of...

Glitch Power Minimization by Selective Gate Freezing (2000)

Luca Benini, Giovanni De Micheli, Alberto Macii, Student Member, Enrico Macii, Massimo Poncino, ...

Abstract—This paper presents a technique for glitch power minimization in combinational circuits. The total number of glitches is reduced by replacing some existing gates with functionally...

Energy Efficient Source Code Transformation based on Value Profiling (2000)

Eui-young Chung, Luca Benini, Giovanni De Micheli

This paper presents a source code transformation technique based on value profiling for energy-efficient system design. This technique reduces the computational effort of the program by specializing...

Synthesis of Application-Speci c Memories for Power Optimization in Embedded Systems," DAC-37 (2000)

Luca Benini, Alberto Macii

This paper presents a novel approach to memory power optimization for embedded systems based on the exploitation of data locality. Locations with highest access frequency are mapped onto a small,...

Synthesis of Application-Speci c Memories for Power Optimization in Embedded Systems," DAC-37 (2000)

Luca Benini, Alberto Macii

This paper presents a novel approach to memory power optimization for embedded systems based on the exploitation of data locality. Locations with highest access frequency are mapped onto a small,...

Dynamic power management for portable systems (2000)

Tajana Simunic, Luca Benini, Peter Glynny, Giovanni De Micheli

Portable systems require long battery lifetime while still delivering high performance. Dynamic power management (DPM) policies trade o the performance for the power consumption at the system level...

Quantitative Comparison of Power Management Algorithms (2000)

Yung-hsiang Lu, Eui-young Chung, Luca Benini, Giovanni De Micheli

Dynamic power management saves power by shutting down idle devices. Several management algorithms have been proposed and demonstrated effective in certain applications. We quantitatively compare the...

A survey of design techniques for system-level dynamic power management (2000)

Luca Benini, Ro Bogliolo, Giovanni De Micheli

Abstract—Dynamic power management (DPM) is a design methodology for dynamically reconfiguring systems to provide the requested services and performance levels with a minimum number of active...

Dynamic Power Management of Laptop Hard Disk (2000)

Luca Benini, Peter Glynn, Giovanni De Micheli

Optimal power management policies for laptop hard disk are obtained with a system model that can handle non-exponential interarrival times in the idle and the sleep states. The measurement results on...

Requester-Aware Power Reduction (2000)

Yung-hsiang Lu, Luca Benini, Giovanni De Micheli

Typically, power reduction is conducted by hardware techniques, such as varying clock frequencies and/or supply voltages. However, hardware devices consume power to serve the requests from software...

Low-power task scheduling for multiple devices (2000)

Yung-hsiang Lu, Luca Benini, Giovanni De Micheli

Power management saves power by shutting down idle devices. These devices often serve requests from concurrently running tasks. Ordering task execution can adjust the lengths of idle periods and...

Dynamic power management for portable systems (2000)

Tajana Simunic, Luca Benini, Giovanni De Micheli

The policy optimization problem for dynamic power management has received considerable attention in the recent past. We formulate policy optimization as a constrained optimization problem on...

Low-power task scheduling for multiple devices (2000)

Yung-hsiang Lu, Luca Benini, Giovanni De Micheli

Power management saves power by shutting down idle devices. These devices often serve requests from concurrently running tasks. Ordering task execution can adjust the lengths of idle periods and...

System-Level Power Optimization: Techniques and Tools (2000)

Luca Benini, Giovanni De Micheli

This tutorial surveys design methods for energy-efficient system-level design. We consider electronic systems consisting of a hardware platform and software layers. We consider the three major...

Quantitative Comparison of Power Management Algorithms (2000)

Yung-Hsiang Lu, Eui-Young Chung, Tajana Simunic, Luca Benini, Giovanni De Micheli

Dynamic power management saves power by shutting down idle devices. Several management algorithms have been proposed and demonstrated effective in certain applications. We quantitatively compare the...

Source Code Optimization and Profiling of Energy Consumption in Embedded Systems (2000)

Tajana Simunic, Luca Benini, Simuni'c Luca Benini, Giovanni De Micheli, Mat Hans

This paper presents a source code optimization methodology and a profiling tool that have been developed to help designers in optimizing software performance and energy in embedded systems. Code...

Dynamic Power Management for Portable Systems (2000)

Tajana Simunic, Luca Benini, Peter Glynn, Giovanni De Micheli

Portable systems require long battery lifetime while still delivering high performance. Dynamic power management (DPM) policies trade off the performance for the power consumption at the system level...

Quantitative Comparison of Power Management Algorithms (2000)

Yung-Hsiang Lu Eui-Young, Eui-young Chung, Luca Benini, Giovanni De Micheli

Dynamic power management saves power by shutting down idle devices. Several management algorithms have been proposed and demonstrated effective in certain applications. We quantitatively compare the...

A Recursive Algorithm for Low-Power Memory Partitioning (2000)

Massimo Poncino, Luca Benini, Luca Benini, Alberto Macii, Alberto Macii, Massimo Poncino

Memory-processor integration offers new opportunities for reducing the energy of a system. In the case of embedded systems, one solution consists of mapping the most frequently accessed addresses...

Dynamic Power Management of Laptop Hard Disk (2000)

Ta Ana Simunic, Luca Benini, Peter Glynn, Giovanni De Micheli

Optimal power management policies for laptop hard disk are obtained with a system model that can handle non-exponential interarrival times in the idle and the sleep states. The measurement results on...

A Survey of Design Techniques for System-Level Dynamic Power Management (2000)

Luca Benini, Alessandro Bogliolo, Ro Bogliolo, Giovanni De Micheli

Dynamic power management (DPM) is a design methodology for dynamically reconfiguring systems to provide the requested services and performance levels with a minimum number of active components or a...

Regression-Based RTL Power Modeling (2000)

Alessandro Bogliolo, Luca Benini, Giovanni De Micheli

this paper we propose a general methodology for building and tuning RTL power models. We address both hard macros (presynthesized functional blocks) and soft macros (functional units for which only a...

Dynamic power management for non-stationary service requests (1999)

Eui-young Chung, Luca Benini, Ro Bogliolo, Yung-hsiang Lu, Giovanni De Micheli

Abstract—Dynamic Power Management (DPM) is a design methodology aiming at reducing power consumption of electronic systems by performing selective shutdown of idle system resources. The...

Dynamic power management using adaptive learning tree (1999)

Eui-young Chung, Luca Benini, Giovanni De Micheli

Dynamic Power Management (DPM) is a technique to reduce power consumption of electronic systems by selectively shutting down idle components. The quality of the shutdown control algorithm (power...

Dynamic power management using adaptive learning tree (1999)

Eui-young Chung, Luca Benini, Giovanni De Micheli

Dynamic Power Management (DPM) is a technique to reduce power consumption of electronic systems by selectively shutting down idle components. The quality of the shutdown control algorithm (power...

Energy-Efficient Design of Battery-Powered Embedded Systems (1999)

Tajana Simunic, Luca Benini, Giovanni De Micheli

Energy-efficient design of battery-powered embedded systems demands optimizations in both hardware and software. In this work we leverage cycle-accurate energy consumption models to explore compiler...

Cycle-Accurate Simulation of Energy Consumption in Embedded Systems (1999)

Tajana Simunic, Luca Benini, Simuni'c Luca Benini, Giovanni De Micheli

This paper presents a methodology for cycle-accurate simulation of energy dissipation in embedded systems. The ARM Ltd. [1] instruction-level cycle-accurate simulator is extended with energy models...

Reducing Switching Activity on Datapath Buses with Control-Signal Gating (1999)

Hema Kapadia, Luca Benini, Giovanni De Micheli

This paper presents a technique for saving power dissipation in large datapaths by reducing unnecessary switching activity on buses. The focus of the technique is on achieving effective power savings...

Event-Driven Power Management of Portable Systems (1999)

Tajana Simunic, Luca Benini, Giovanni De Micheli

The policy optimization problem for dynamic power management has received considerable attention in the recent past. We formulate policy optimization as a constrained optimization problem on...

Policy Optimization for Dynamic Power Management (1999)

Luca Benini, Alessandro Bogliolo, Giuseppe A. Paleologo, Ro Bogliolo, Student Member, Giovanni De Micheli

Dynamic power management schemes (also called policies) reduce the power consumption of complex electronic systems by trading off performance for power in a controlled fashion, taking system workload...

Event-Driven Power Management (1999)

Of Portable Systems, Tajana Simunic, Luca Benini, Giovanni De Micheli

The policy optimization problem for dynamic power management has received considerable attention in the recent past. We formulate policy optimization as a constrained optimization problem on...

Event-driven Power Management (1999)

Tajana Simunic Luca, Luca Benini, Peter Glynn, Giovanni De Micheli

Energy consumption of electronic devices has become a serious concern in recent years. Power management (PM) algorithms aim at reducing energy consumption at the system-level by selectively placing...

Selective instruction compression for memory energy reduction in embedded systems (1999)

Luca Benini, Albert Macii, Enrico Macii, Massimo Poncino

We propose a technique for reducing the energy required by firmware code to ezecute on embedded systema. The method ia based on the idea of compressing the moat commonly ezecuted instructions 80 a ~...

Cycle-Accurate Simulation of Energy Consumption in Embedded Systems (1999)

Tajana Simunic Luca, Luca Benini, Giovanni De Micheli

This paper presents a methodology for cycle-accurate simulation of energy dissipation in embedded systems. The ARM Ltd. #1# instruction-level cycle-accurate simulator is extended with energy models...

Dynamic Power Management for non-stationary service requests (1999)

Eui-Young Chung Eychung, Luca Benini

Dynamic Power Management is a design methodology aiming at reducing power consumption of electronic systems, by performing selective shutdown of the idle system resources. The effectiveness of a...

Characterization-free behavioral power modeling (1998)

Alessandro Bogliolo, Luca Benini, Giovanni De Micheli Y

We propose a new approach to RT-level power modeling for combinational macros, that does not require simulationbased characterization. A pattern-dependent power model for a macro is analytically...

Dynamic power management of electronic systems (1998)

Luca Benini, Alessandro Bogliolo, Giovanni De Micheli

Dynamic power management is a design methodology aiming at controlling performance and power levels of digital circuits and systems, with the goal of extending the autonomousoperation time of...

Address bus encoding techniques for system-level power optimization (1998)

Luca Benini, Giovanni De Micheli

The power dissipated by system-level buses is the largest contribution to the global power of complex VLSI circuits. Therefore, the minimization of the switching activity at the I/O interfaces can...

Dynamic power management of electronic systems (1998)

Luca Benini, Alessandro Bogliolo, Giovanni De Micheli

Dynamic power management is a design methodology aiming at controlling performance and power levels of digital circuits and systems, with the goal of extending the autonomousoperation time of...

Power optimization of core-based systems by address bus encoding (1998)

Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Stefano Quer

Abstract — This paper presents a solution to the problem of reducing the power dissipated by a digital system containing an intellectual proprietary core processor which repeatedly executes a...

Address bus encoding techniques for system-level power optimization (1998)

Luca Benini, Giovanni De Micheli

The power dissipated by system-level buses is the largest contribution to the global power of complex VLSI circuits. Therefore, the minimization of the switching activity at the I/O interfaces can...

Telescopic Units: A New Paradigm for Performance Optimization of VLSI Designs (1998)

Luca Benini, Enrico Macii, Massimo Poncino, Giovanni De Micheli

This paper introduces a novel optimization paradigm for increasing the throughput of digital systems. The basic idea consists of transforming fixed-latency units into variable-latency ones that run...

In-Place Power Optimization for LUT-Based FPGAs (1998)

Balakrishna Kumthekar, Luca Benini, Enrico Macii, Fabio Somenzi

This paper presents a new technique to perform power-oriented re-configuration of a system implemented using LUT FPGAs. The main features of our approach are: Accurate exploitation of degrees of...

Iterative Remapping for Logic Circuits (1998)

Luca Benini, Patrick Vuillod, Giovanni De Micheli

This paper presents an aggressive optimization technique targeting combinational logic circuits. Starting from an initial implementation mapped on a given technology library, the network is optimized...

Characterization-Free Behavioral Power Modeling (1998)

Alessandro Bogliolo, Luca Benini, Giovanni De Micheli

We propose a new approach to RT-level power modeling for combinational macros, that does not require simulationbased characterization.Apattern-dependent power model for a macro is analytically...

Reducing Power Consumption of Dedicated Processors through Instruction Set Encoding (1998)

Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino

With the increased clock frequency of modern, high-performance processors #over 500 MHz, in some cases#, limiting the power dissipation has become the most stringent design target. It is thus...

Fast Power Estimation for Deterministic Input Streams (1997)

Luca Benini, Giovanni De Micheli

The power dissipated by digital systems under realistic input stimuli is not accurately described by a single average value, but by a waveform that shows how power consumption varies over time as the...

Gate-level power and current simulation of CMOS integrated circuits (1997)

Ro Bogliolo, Luca Benini, Giovanni De Micheli, Bruno Riccò

Abstract—In this paper, we present a new gate-level approach to power and current simulation. We propose a symbolic model of complementary metal–oxide–semiconductor (CMOS) gates to capture the...

Gate-level power and current simulation of CMOS integrated circuits (1997)

Ro Bogliolo, Luca Benini, Giovanni De Micheli, Bruno Riccò

Abstract—In this paper, we present a new gate-level approach to power and current simulation. We propose a symbolic model of complementary metal–oxide–semiconductor (CMOS) gates to capture the...

Telescopic units: increasing the average throughput of pipelined designs by adaptive latency control (1997)

Luca Benini

This paper presents a technique, alternative to performancedriven synthesis, that allows to drastically increase the average throughput of combinational logic blocks by transforming xedlatency units...

Adaptive Least Mean Square Behavioral Power Modeling (1997)

A. Bogliolo, L. Benini, Luca Benini, Giovanni De Micheli

In this work we propose an e#ective solution to the main challenges of behavioral power modeling# the generation of models for the power dissipation of technology#independent soft macros and the...

A Survey of Boolean Matching Techniques for Library Binding (1997)

Luca Benini, Giovanni De Micheli

When binding a logic network to a set of cells, a fundamental problem is recognizing whether a cell can implement a portion of the network. Boolean...

Environments through Wireless PDA” (1996)

Davide Brunelli, Supervisor Prof, Luca Benini

♦ Development of new techniques of Energy Scavenging for Wireless Sensor Networks (WSN) and embedded systems. The study is focused both on hardware and software issues. In particular hardware...

Transformation and synthesis of FSMs for low-power gated-clock implementation (1995)

Luca Benini, Giovanni De Micheli

We present a technique that automatically synthesizes finite state machines with gated clocks to reduce the power dissipation of the final implementation. We describe a new transformation for general...

Real-Time High-Sensitivity Impedance Measurement Interface for Tethered BLM Biosensor Arrays

Temiz, Yuksel, K. Gurkaynak, Frank, Terrettaz, Samuel, Vogel, Horst, De Micheli, Giovanni, Leblebici, Yusuf, ...

This paper presents a switched-capacitor (SC) current integrator circuit for impedance measurement of tethered bilayer lipid membrane (tBLM) biosensors. The circuit comprises a small number of high...