Maya Gokhale

Publication List Details

Period

1998 - 2008

Number

21

Co-Authors

Partitioning Hardware and Software for Reconfigurable Supercomputing Applications: A Case Study (2008)

Anders ˚a. Hanson, Maya Gokhale, Henning Mortveit

Often reconfigurable systems are reported to have 10 × to 100 × speedup over that of a software system. However, the reconfigurable hardware must usually be combined with software to form an entire...

A Reconfigurable Computing Framework for Multi-scale Cellular Image Processing (2008)

Reid Porter, Jan Frigo, Al Conti, Neal Harvey, Garrett Kenyon, Maya Gokhale

Cellular computing architectures represent an important class of computation that are characterized by simple processing elements, local interconnect and massive parallelism. These architectures are...

Reservation Station Architecture for Mutable Functional Unit Usage in Superscalar Processors (2008)

Yan Solihin, Kirk W. Cameron, Yong Luo, Dominique Lavenier, Maya Gokhale

One major bottleneck of a superscalar processor is mismatch of instruction stream mix with functional unit configuration. Depending on the type and number of functional units, the performance loss...

sc2C-to-FPGA Compiler (2008)

Maya Gokhale, Jan Stone, Jan Frigo, Christine Ahrens

sc2 is a new, open source implementation of the Streams-C language and compiler [1] that uses the Stanford SUIF 1.3 compiler infrastructure [2]. sc2 has been improved through various standard...

Dynamically Mutable Functional Unit in Superscalar Processors (2007)

Yan Solihin, Kirk W. Cameron, Yong Luo, Dominique Lavenier, Maya Gokhale

One major bottleneck of a superscalar processor is the mismatch of instruction stream mix with functional unit configuration. Depending on the type and number of functional units, the performance...

Optimizing Digital Hardware Perceptrons for Multi-Spectral Image Classification (2007)

Reid Porter, Neal Harvey, Simon Perkins, James Theiler, Steven Brumby, Jeff Bloch, ...

Abstract. We propose a system for solving pixel-based multi-spectral image classification problems with high throughput pipelined hardware. We introduce a new shared weight network architecture that...

Experience with a hybrid processor: K-means clustering (2007)

Maya Gokhale, Jan Frigo, Kevin Mccabe, James Theiler, Christophe Wolinski, Dominique Lavenier

Abstract We discuss hardware/software co-processing on a hybrid processor for a compute- and data-intensive multispectral imaging algorithm, k-means clustering. The experiments are performed on two...

1 Reservation Station Architecture for Mutable Functional Unit Usage in (2007)

Superscalar Processors, Yan Solihin, Kirk W. Cameron, Yong Luo, Dominique Lavenier, Maya Gokhale

One major bottleneck of a superscalar processor is mismatch of instruction stream mix with functional unit configuration. Depending on the type and number of functional units, the performance loss...

A hardware/software approach to molecular dynamics on reconfigurable computers (2006)

Ronald Scrofano, Maya Gokhale, Frans Trouw, Viktor K. Prasanna

With advances in reconfigurable hardware, especially field-programmable gate arrays (FPGAs), it has become possible to use reconfigurable hardware to accelerate complex applications, such as those in...

Reconfigurable Computing - Accelerating Computation with Field-Programmable Gate Arrays (2005)

Gokhale, Maya, Graham, Paul S.

This volume is unique: the first comprehensive exposition of the exciting new field of Reconfigurable Computing with FPGAs. By mapping algorithms directly into programmable logic, FPGA accelerators...

Detecting a malicious executable without prior knowledge of its patterns (2005)

James Theiler, Maya Gokhale

To detect malicious executables, often spread as email attachments, two types of algorithms are usually applied under instance-based statistical learning paradigms: 1) Signature-based template...

Dynamic reconfiguration for management of radiation-induced faults (2004)

Maya Gokhale, Paul Graham, Michael Wirthlin, D. Eric Johnson, Nathaniel Rollins

Abstract — This paper describes novel methods of exploiting the partial, dynamic reconfiguration capabilities of Xilinx Virtex V1000 FPGAs to manage single-event upset (SEU) faults due to radiation...

Monte carlo radiative heat transfer simulation on a reconfigurable computer (2004)

Maya Gokhale, Janette Frigo, Christine Ahrens, Ron Minnich

Abstract. Recently, the appearance of very large (3 – 10M gate) FPGAs with embedded arithmetic units has opened the door to the possibility of floating point computation on these devices. While...

Early experience with a hybrid processor: k-means clustering (2001)

Maya Gokhale, Jan Frigo, Kevin Mccabe, James Theiler, Dominique Lavenier

Abstract We discuss hardware/software coprocessing on a hybrid processor for a compute- and data-intensive hyper-spectral imaging algorithm, KMeans Clustering. The experiments are performed on the...

Co-design of Software and Hardware to Implement Remote Sensing Algorithms (2001)

James Theiler, Jan Frigo, Maya Gokhale, John J. Szymanski

Both for o#ine searches through large data archives and for onboard computation at the sensor head, there is a growing need for ever-more rapid processing of remote sensing data. For many algorithms...

Interfacing Interpreted and Compiled Languages to Support Applications on a Massively Parallel Network of Workstations (MP-NOW) (1999)

Kepner, Jeremy, Gokhale, Maya, Minnich, Ron, Marks, Aaron, DeGood, John

Astronomers are increasingly using Massively Parallel Network of Workstations (MP-NOW) to address their most challenging computing problems. Fully exploiting these systems is made more difficult as...

Boosting the Speedup of Future Processor Architectures by Using Mutable Functional Units (1999)

Yan Solihin, Kirk W. Cameron, Yong Luo, Dominique Lavenier, Maya Gokhale

One major bottleneck of a superscalar processor is the mismatch of instruction stream mix with functional unit configuration. The resulting "unavailable functional unit" stalls can be a...

Streams-C; Sc2 C-to-FPGA Compiler (1998)

Gokhale, Maya, Frigo, Janette, Ahrens, Christine, Popkin-Paine, Marc, Stone, Janice M.

Viewgraphs from presentation of a compiler which synthesizes hardware circuits that run on reconfigurable hardware from parallel C programs.