Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano
Fat H-Tree is a novel tree-based interconnection network providing a torus structure, which is formed by combining two folded H-Tree networks, and is an attractive alternative to tree-based networks...
Michihiro Koibuchi, Konosuke Watanabe, Tomohiro Otsuka, Hideharu Amano
arbitrary topologies, have been used to connect nodes in PC/WS clusters or high-performance storage systems. Although deadlock-free routings, multicasts, and topologies for SANs have been widely...
A Partial Irregular-Network Routing on Faulty k-ary n-cubes (2008)
Michihiro Koibuchi, Tsutomu Yoshinaga
Interconnection networks have been studied to connect a number of processing elements on parallel computers. Their design increasingly includes a challenge to high faulttolerance, as entire systems...
Enforcing In-Order Packet Delivery in PC Clusters using Adaptive Routing (2008)
Michihiro Koibuchi, Antonio Robles, Pedro Lopez, Jose Duato
Adaptive routing has been widely studied for interconnection networks in massively parallel computers and system area networks (SAN). Adaptive routing dynamically selects the path followed by...
A Parametric Study of Scalable Interconnects on FPGAs (2008)
Daihan Wang, Hiroki Matsutani, Masato Yoshimi, Michihiro Koibuchi, Hideharu Amano
Abstract — With the constantly increasing gate capacity of FP-GAs, a single FPGA chip is able to employ large-scale applications. To connect a large number of computational nodes, Network-On-Chip...
Architectural Design of Next-Generation Science Information Network (2007)
URUSHIDANI, Shigeo, ABE, Shunji, FUKUDA, Kensuke, MATSUKATA, Jun, JI, Yusheng, KOIBUCHI, Michihiro, ...
This paper proposes an advanced hybrid network architecture and a comprehensive network design of the next-generation science information network, called SINET3. Effectively combining layer-1...
A Port Combination Methodology for Application-Specific Networks-on-Chip on FPGAs (2007)
WANG, Daihan, MATSUTANI, Hiroki, KOIBUCHI, Michihiro, AMANO, Hideharu
A temporal correlation based port combination algorithm that customizes the router design in Network-on-Chip (NoC) is proposed for reconfigurable systems in order to minimize required hardware...
Non-Minimal Routing Strategy for Application-Specific Networks-onChips (2005)
Hiroki Matsutani, Michihiro Koibuchi, Yutaka Yamada, Akiya Jouraku, Hideharu Amano
We propose a deterministic routing strategy called flee which introduces non-minimal paths in order to distribute traffic with a high degree of communication locality in Networks-on-Chips. In the...
Folded Fat H-Tree: An Interconnection Topology for Dynamically Reconfigurable Processor Array (2005)
Yutaka Yamada, Hideharu Amano, Michihiro Koibuchi, Akiya Jouraku, Kenichiro Anjo, Katsunobu Nishimura
Abstract. Fat H-Tree is a novel on-chip network topology for a dynamic reconfigurable processor array. It includes both fat tree and torus structure, and suitable to map tasks in a stream processing....
KOIBUCHI, Michihiro, JOURAKU, Akiya, AMANO, Hideharu
Adaptive routing algorithms, which dynamically select the route of a packet, have been widely studied for interconnection networks inmassively parallel computers. An output selection function (OSF),...
BLACK-BUS: A New Data-Transfer Technique using Local Address on Networks-on-Chips (2004)
Kenichiro Anjo, Yutaka Yamada, Michihiro Koibuchi, Akiya Jouraku, Hideharu Amano
Network-on-a-Chip (NoC) has received attention as a high-performance interconnect, because traditional buses, which can’t transfer more than one data-stream simultaneously, are more likely to...
Michihiro Koibuchi, Akiya Jouraku, Konosuke Watanabe, Hideharu Amano
System Area Networks (SANs), which usually accept irregular topologies, have been used to connect nodes in PC/WS clusters or high-performance storage systems. Since wormhole or virtual cut-through...
Routing Algorithms Based on 2D Turn Model for Irregular Networks (2002)
Akiya Jouraku, Michihiro Koibuchi, Hideharu Amano, Akira Funahashi
In order to solve traffic unbalancing caused by up*/down * routing for irregular networks, two-dimensional direction is introduced into a spanning tree, and novel routing algorithms based on...
Michihiro Koibuchi, Akiya Jouraku, Hideharu Amano
In PC clusters or high performance I/O networks including InfiniBand, network topologies often become irregular. Although various adaptive routings for irregular networks have been proposed, most of...