Sensitivity Based Power Management of Enterprise Storage Systems (2009)
Sriram Sankar, Sudhanva Gurumurthi, Mircea R. Stan
Energy-efficiency is a key requirement in data centers today. Storage systems constitute a significant fraction of the energy consumed in a data center and therefore enterprise storage systems need...
Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model (2009)
Wei Huang, Karthik Sankaranarayanan, Kevin Skadron, Senior Member, Robert J. Rib, Mircea R. Stan, ...
Abstract — Preventing silicon chips from negative, even disastrous thermal hazards has become increasingly challenging these days; considering thermal effects early in the design cycle is thus...
Intra-Disk Parallelism: An Idea Whose Time Has Come (2009)
Sriram Sankar, Sudhanva Gurumurthi, Mircea R. Stan
Server storage systems use a large number of disks to achieve high performance, thereby consuming a significant amount of power. In this paper, we propose to significantly reduce the power consumed...
Sensitivity-Based Optimization of Disk Architecture (2009)
Sriram Sankar, Yan Zhang, Sudhanva Gurumurthi, Mircea R. Stan, Senior Member
Abstract—Many applications, especially those that run on servers, are I/O intensive and therefore require high-performance storage systems. These high-end storage systems consume a large amount of...
Diluted chirality dependence in edge rough graphene nanoribbon field-effect transistors (2009)
Tseng, Frank, Unlcer, DIncer, Holcomb, Katherine, Stan, Mircea R., Ghosh, Avik W.
We investigate the role of various structural nonidealities on the performance of armchair-edge graphene nanoribbon field effect transistors (GNRFETs). Our results show that edge roughness dilutes...
Lei He, Weiping Liao, Mircea R. Stan
The high leakage devices in nanometer technologies as well as the low activity rates in system-on-a-chip (SOC) contribute to the growing significance of leakage power at the system level. We first...
A Flexible, Technology Adaptive Memory Generation Tool (2008)
Adam C. Cabe, Zhenyu Qi, Wei Huang, Yan Zhang, Mircea R. Stan, Garrett S. Rose
Memories are by far the most dominating circuit structure found in modern day application specific integrated circuits (ASIC) and system-on-chips (SoC). When considering efficiency, it is not deemed...
Unluer, Dincer, Tseng, Frank, Ghosh, Avik W., Stan, Mircea R.
We investigate theoretically the performance advantages of all-graphene nanoribbon field-effect transistors (GNRFETs) whose channel and source/drain (contact) regions are patterned monolithically...
Multi-Dimensional Circuit and Micro-Architecture Level Optimization (2008)
Zhenyu(jerry Qi, Matthew Ziegler, Stephen V. Kosonocky, Janm. Rabaey, Mircea R. Stan
This paper studies multi-dimensional optimization at both circuit and micro-architecture levels. By formulating and solving the optimization problem with conflicting design objectives and multiple...
Mircea R. Stan, Wei Huang, Sivakumar Velusamy, David Tarjan
In recent years, power density in microprocessors has doubled every three years, and experts expect this rate to increase within one to two generations as feature sizes and frequencies scale faster...
Interconnect Lifetime Prediction for Reliability-Aware Systems (2008)
Zhijian Lu, Student Member, Wei Huang, Mircea R. Stan, Senior Member, Kevin Skadron, ...
Abstract—Thermal effects are becoming a limiting factor in high-performance circuit design due to the strong temperature dependence of leakage power, circuit performance, IC package cost, and...
Zhijian Lu, John Lach, Mircea R. Stan, Kevin Skadron
(along with resulting increases in power density) has made thermal-related reliability a major concern in modern IC design. For example, in the deep-submicron region, experts widely regard...
An Improved Block-Based Thermal Model in HotSpot 4.0 with Granularity Considerations (2008)
Wei Huang, Karthik Sankaranarayanan, Robert J. Rib, Mircea R. Stan, Kevin Skadron
This paper describes our most recent improvements to the HotSpot thermal model. First, in response to a previous paper in WDDD 2006 [1] that cites some accuracy shortcomings, we improve treatment in...
and Design]: Real-time systems and embedded systems (2008)
Yan Zhang, Zhijian Lu, John Lach, Kevin Skadron, Mircea R. Stan
This paper presents an optimal procrastinating voltage scheduling (OP-DVS) for hard real-time systems using stochastic workload information. Algorithms are presented for both single-task and...
Many-Core Design from a Thermal Perspective: Extended Analysis and Results (2008)
Wei Huang, Mircea R. Stan, Karthik Sankaranarayanan, Robert J. Rib, Kevin Skadron
Air cooling limits have been a major design challenge in recent years for integrated circuits. Multi-core exacerbates thermal challenges because power scales with the number of cores, but also...
Intra-Disk Parallelism: An Idea Whose Time Has Come (2008)
Sriram Sankar, Sudhanva Gurumurthi, Mircea R. Stan
Power is a big problem in data centers and a significant fraction of this power is consumed by the storage system. Server storage systems use a large number of disks to achieve high performance,...
Low-Power Four-Quadrant Multiplier Using Dual-Gate Transistors (2007)
Arnaud Forestier, Mircea R. Stan
A four-quadrant analog multiplier using a novel type of GaAs transistor is presented. This device, called 2-D MESFET, is dedicated to low power and high speed applications[1],[2]. A special...
Alexandre Tenca Milos, Re F. Tenca, Milos D. Ercegovac, Mircea R. Stan
The theory and practice of up-only (or downonly) prescaled counters is well understood both in industry and in the academia. Until recently it was not known if the design of a fast and large up/down...
Op-amps as "firm" Virtual Components for Systems-on-Chip (2007)
Mircea Stan Rama, Mircea R. Stan, Rama R. Kotapally, Andrew Slutter
We propose a new design methodology for op-amps as "firm" Virtual Components for Systems-on-Chip. A fast time to market, robustness to process variation and process migration, and the fact...
TRANSACTIONS ON VLSI SYSTEMS 1 Low Power CMOS with Sub-Volt Supply Voltages (2007)
Abstract--- In this work we present generic low power techniques for minimizing the energy-delay product for CMOS digital circuits. These techniques, which optimize and use multiple or variable power...
Power Issues Related to Branch Prediction — University Of Virginia Tech.Report CS-2001-25 — (2007)
Dharmesh Parikh, Kevin Skadron, Yan Zhang, Marco Barcella, Mircea R. Stan
dharmesh,skadron¤ This paper explores the role of branch predictor organization in power/energy/performance tradeoffs for processor design. We find that as a general rule, to reduce overall energy...
Kevin Skadron, Tarek Abdelzaher, Mircea R. Stan
This paper proposes the use of formal feedback control theory as a way to implement adaptive techniques in the processor architecture. Dynamic thermal management (DTM) is used as a test vehicle, and...
System Level Leakage Reduction Considering The Interdependence Of Temperature And Leakage (2007)
Lei He, Weiping Liao, Mircea R. Stan
The high leakage devices in nanometer technologies as well as the low activity rates in system-on-a-chip (SOC) contribute to the growing significance of leakage power at the system level. We first...
Lei He, Weiping Liao, Mircea R. Stan
The high leakage devices in nanometer technologies as well as the low activity rates in system-on-a-chip (SOC) contribute to the growing significance of leakage power at the system level. We first...
An Improved Block-Based Thermal Model in HotSpot 4.0 with Granularity Considerations (2007)
Wei Huang, Karthik Sankaranarayanan, Robert J. Rib, Mircea R. Stan, Kevin Skadron
This technical report describes our most recent improvements to the HotSpot thermal model. First, in response to a previous paper in WDDD 2006 [1] that cites some accuracy shortcomings, we improve...
Hotspot: A compact thermal modeling method for CMOS VLSI systems (2006)
Wei Huang, Student Member, Shougata Ghosh, Siva Velusamy, Karthik Sankaranarayanan, Kevin Skadron, ...
Abstract—This paper presents HotSpot—a modeling methodology for developing compact thermal models based on the popular stacked-layer packaging scheme in modern very large-scale integration...
Physically Constrained Architecture for Chip Multiprocessors (2006)
Yingmin Li, Yingmin Li, Kevin Skadron (advisor, Mircea R. Stan, Sudhanva Gurumurthi, Yingmin Li, ...
Recent product announcements show a clear trend towards aggressive integration of multiple cores on a single chip. This kind of architecture is called a “chip multiprocessor ” or CMP. By taking...
Parameterized physical compact thermal modeling (2005)
Wei Huang, Student Member, Mircea R. Stan, Kevin Skadron, Senior Member, Senior Member
Abstract—This paper presents a compact thermal modeling (CTM) approach, which is fully parameterized according to design geometries and material physical properties. While most compact modeling...
The need for a full-chip and package thermal model for thermally optimized ic designs (2005)
Wei Huang, Eric Humenay, Kevin Skadron, Mircea R. Stan
Modeling and analyzing detailed die temperature with a full-chip thermal model at early design stages is important to discover and avoid potential thermal hazards. However, omitting important aspects...
Toward an architectural treatment of parameter variations (2005)
Eric Humenay, Wei Huang, Mircea R. Stan, Kevin Skadron
This paper develops a new model of parameter variations for use in early-stage, pre-RTL architecture studies. It improves over prior models by extending the FMAX model to more faithfully model...
A unified design space for regular Parallel Prefix Adders (2004)
Matthew M. Ziegler, Mircea R. Stan
We consider sparsity, fanout, and radix as three dimensions in the design space of regular parallel prefix adders and present a unified formalism to describe such structures. Keywords: parallel...
Compact thermal modeling for temperature-aware design (2004)
Wei Huang, Mircea R. Stan, Kevin Skadron, Karthik Sankaranarayanan, Shougata Ghosh, Sivakumar Velusamy
Thermal design in sub-100nm technologies has become one of the major challenges to the CAD community. Thermal effects on design aspects such as performance, power and reliability have to be...
Compact thermal modeling for temperature-aware design (2004)
Wei Huang, Mircea R. Stan, Kevin Skadron, Karthik Sankaranarayanan, Shougata Ghosh, Sivakumar Velusamy
Thermal design in sub-100nm technologies is one of the major challenges to the CAD community. In this paper, we first introduce the idea of temperature-aware design. We then propose a compact thermal...
Wei Huang, Mircea R. Stan, Kevin Skadron
This paper presents an approach of compact thermal modeling — HotSpot, which is parameterized according to design geometrical dimensions and material physical properties. While most existing...
Temperature-aware microarchitecture (2003)
Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Sankaranarayanan, David Tarjan
With power density and hence cooling costs rising exponentially, processor packaging can no longer be designed for the worst case, and there is an urgent need for runtime processor-level techniques...
Temperature-aware microarchitecture (2003)
Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Sankaranarayanan, David Tarjan
skadron,siva,karthick,dtarjan¦ With power density and hence cooling costs rising exponentially, processor packaging can no longer be designed for the worst case, and there is an urgent need for...
Alloyed Branch History: Combining Global and Local Branch History for Robust Performance (2003)
Zhijian Lu, John Lach, Mircea R. Stan, Kevin Skadron
This paper introduces alloyed prediction, a new two-level predictor organization that combines global and local history in the same structure, combining the advantages of two-level predictors and...
Temperature-aware microarchitecture (2003)
Kevin Skadron, Mircea R. Stan, Karthik Sankaranarayanan, Wei Huang, Sivakumar Velusamy, David Tarjan
With cooling costs rising exponentially, designing cooling solutions for worst-case power dissipation is prohibitively expensive. Chips that can autonomously modify their execution and...
Molecular electronics: From devices and interconnect to circuits and architecture (2003)
Mircea R. Stan, Paul D. Franzon, Senior Member, Senior Member, Seth Copen Goldstein, John C. Lach, ...
As the dominating CMOS technology is fast approaching a “brick wall, ” new opportunities arise for competing solutions. Nanoelectronics has achieved several breakthroughs lately and promises to...
Temperature-aware microarchitecture (2003)
Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Tarjan
skadron,siva,karthick,dtarjan¦ With power density and hence cooling costs rising exponentially, processor packaging can no longer be designed for the worst case, and there is an urgent need for...
Hotspot: a dynamic compact thermal model at the processorarchitecture level (2003)
Mircea R. Stan, Kevin Skadron, Marco Barcella, Wei Huang, Karthik Sankaranarayanan, Sivakumar Velusamy
This paper describes a thermal-modeling approach that is easy to use and computationally efficient for modeling thermal effects and thermal-management techniques at the processor architecture level....
Temperature-Aware Microarchitecture (2003)
Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Sankaranarayanan, David Tarjan
With power density and hence cooling costs rising exponentially, processor packaging can no longer be designed for the worst case, and there is an urgent need for runtime processor-level techniques...
Yingmin Li, Kevin Skadron, Mircea R. Stan
This paper provides new insights on how to integrate power-saving techniques by using queue occupancies to dynamically match the power-saving modes of various pipeline stages with the current...
Odd/even bus invert with two-phase transfer for buses with coupling (2002)
Yan Zhang, John Lach, Kevin Skadron, Mircea R. Stan
The coupling capacitances between on-chip bus lines become dominant in deep-submicron technologies. Coding to reduce the switching activity of the individual lines was enough to reduce power on buses...
Kevin Skadron, Tarek Abdelzaher, Mircea R. Stan
This paper proposes the use of formal feedback control theory as a way to implement adaptive techniques in the processor architecture. Dynamic thermal management (DTM) is used as a test vehicle, and...
Kevin Skadron, Tarek Abdelzaher, Mircea R. Stan
This paper proposes the use of formal feedback control theory as a way to implement adaptive techniques in the processor architecture. Dynamic thermal management (DTM) is used as a test vehicle, and...
Power Issues Related to Branch Prediction (2002)
Dharmesh Parikh, Kevin Skadron, Yan Zhang, Marco Barcella, Mircea R. Stan
dharmesh,skadron£ This paper explores the role of branch predictor organization in power/energy/performance tradeoffs for processor design. We find that as a general rule, to reduce overall energy...
Kevin Skadron, Tarek Abdelzaher, Mircea R. Stan
This paper proposes the use of formal feedback control theory as a way to implement adaptive techniques in the processor architecture. Dynamic thermal management (DTM) is used as a test vehicle, and...
Low Power Design for ASIC Cores (2001)
Alvar Dean, David Garrett, Mircea R. Stan, Sebastian Ventrone
A semicustom ASIC design methodology is used to develop a low power DSP core for mobile (battery powered) applications. Different low power design techniques are used, including dual voltage, low...
Low Threshold CMOS Circuits with Low Standby Current (1998)
Multi-Voltage CMOS (MVCMOS) is a design methodology for very low power supply voltages that uses low-threshold transistors in series with the supply rails. The control voltages on the gating...
Low-Power Encodings for Global Communication in CMOS VLSI (1997)
Mircea R. Stan, Wayne P. Burleson
Technology trends and especially portable applications are adding a third dimension (power) to the previously two-dimensional (speed, area) VLSI design space [30]. A large portion of power...
Synchronous Up/Down Counter with Period Independent of Counter Size (1996)
Mircea R. Stan, Wayne P. Burleson
The theory and practice of up-only (or downonly) prescaled counters is well understood both in industry and in the academia but until now it was not known if the design of a prescaled up/down binary...
Coding a Terminated Bus for Low Power (1995)
Mircea R. Stan, Wayne P. Burleson
Coding was proposed as a general method of decreasing power dissipation for the I/O [4, 5]. Lower power dissipation can be obtained by using extra bus lines for coding the data. This paper presents...
Low-power CMOS clock drivers (1995)
Mircea R. Stan, Wayne P. Burleson
The clock tree of modern synchronous VLSI circuits can consume as much as 50% of their entire power budget. Different methods of decreasing clock power dissipation have been proposed based on...
Bus-Invert Coding for Low Power I/O (1995)
Mircea R. Stan, Wayne P. Burleson
Technology trends and especially portable applications drive the quest for low-power VLSI design. Solutions that involve algorithmic, structural or physical transformations are sought. The focus is...
Bus-Invert Coding for Low-Power I/O (1995)
Mircea R. Stan, Wayne P. Burleson
Abstruct- Technology trends and especially portable applications drive the quest for low-power VLSI design. Solutions that involve algorithmic, structural or physical transformations are sought. The...
Limited-weight codes for low-power I/O
Mircea R. Stan, Wayne P. Burleson
Capacitances for the I/O tend to be several orders of magnitude larger than for the internal circuit. Decreasing the number of transitions at the I/O will then translate into large savings in power...