Parallel Backprojection: A Case Study in High-Performance Reconfigurable Computing (2009)
High-performance reconfigurable computing (HPRC) is a novel approach to provide large-scale computing power to modern scientific applications. Using both general-purpose processors and FPGAs allows...
Parallel Backprojection: A Case Study in High-Performance Reconfigurable Computing (2009)
High-performance reconfigurable computing (HPRC) is a novel approach to provide large-scale computing power to modern scientific applications. Using both general-purpose processors and FPGAs allows...
Variable Precision Floating Point Division and Square Root (2008)
Division and square root are important operations in many high performance signal processing applications including matrix inversion, vector normalization, least squares lattice filters and Cholesky...
ALibrary of Parameterized Hardware Modules for Floating-Point Arithmetic and Their Use (2008)
Pavle Belanović, Miriam Leeser
Many algorithms benefit from acceleration with reconfigurable hardware. This acceleration results from the exploitation of the fine-grained parallelism available in reconfigurable hardware. Custom...
VFORCE: VSIPL++ for Reconfigurable Computing Environments (2008)
Albert Conti, Nicholas Moore, Miriam Leeser, Laurie Smith King
collection of object-oriented interfaces to commonly used signal processing algorithms, such as the Fast Fourier Transform and FIR filters [1]. A reference implementation for VSIPL++ is available....
C. Computer Systems Organization (2008)
Wang Chen, Panos Kosmas, Miriam Leeser, Subjects Real-time, Embedded Systems
Understanding and predicting electromagnetic behavior is needed more and more in modern technology. The Finite-Difference Time-Domain (FDTD) method is a powerful computational electromagnetic...
A. PIV Real-time Particle Image Velocimetry for Feedback Loops Using FPGA Implementation (2008)
Haiqian Yu, Miriam Leeser, Gilead Tadmor, Stefan Siegel
Digital Particle Image Velocimetry (PIV) is well established as a fluid dynamics measurement tool, being capable of non-intrusively and concurrently measuring a distributed velocity filed. Yet the...
C. Computer Systems Organization (2008)
Wang Chen, Panos Kosmas, Miriam Leeser, Subjects Real-time, Embedded Systems
Understanding and predicting electromagnetic behavior is needed more and more in modern technology. The Finite-Difference Time-Domain (FDTD) method is a powerful computational electromagnetic...
Problem Multimedia Macros for Portable Optimized Programs (2008)
Juan Carlos Rojas, Miriam Leeser
Multimedia architectures can speed-up applications significantly when programmed manually. Optimized programs have been non-portable up to now, because of differences in instruction sets, register...
A Graph-Based Power Estimation Method for Combinational CMOS Circuits (2008)
We present a new method of gate-level power estimation that combines the advantages of simulation-based and probabilistic methods. We build a graph that captures the essential behavior of the circuit...
Truly Rapid Prototyping Requires High Level Synthesis (2007)
Goran Doncev, Miriam Leeser, Shantanu Tarafdar
We examine the application of High Level Synthesis to FPGA based systems. Only with the combination of abstract design tools and field programmable logic will a designer achieve truly rapid...
Space and Remote Sensing Sciences Group (2007)
Mike Estlick, Miriam Leeser, James Theiler
In mapping the k-means algorithm to FPGA hardware, we examined algorithm level transforms that dramatically increased the achievable parallelism. We apply the k-means algorithm to multi-spectral and...
Miriam Leeser, James Theiler, Michael Estlick, Natasha Kitaryeva, John J. Szymanski
We investigate the effect of truncating the precision of hyperspectral image data for the purpose of more efficiently segmenting the image using a variant of k-means clustering. We describe the...
Increasing Data Cache Efficiency for MPEG-2 Video Decoding (2007)
Peter Soderquist, Miriam Leeser
Multimedia applications are becoming a key component of microcomputer workloads. Prominent among these is digital video decoding using the prevalent MPEG Video encoding standard. The unanimous...
Miriam Leeser, Pavle Belanovic, Michael Estlick, John J. Szymanski, James Theiler
Unsupervised clustering is a powerful technique for processing multispectral and hyperspectral images. Last year, we reported on an implementation of k-means clustering for multispectral images. Our...
Nicholas Moore, Albert Conti, Miriam Leeser, Benjamin Cordes, Laurie Smith King
This paper presents Vforce, an extensible framework for developing portable reconfigurable supercomputer applications. Reconfigurable supercomputer architectures are based on classic multi-node...
A Library of Parameterized Floating-point Modules And Their Use (2002)
Pavle Belanovic, Miriam Leeser
We present a parameterized floating-point library for use with reconfigurable hardware. Our format is both general and flexible. All IEEE formats are a subset of our format, as are all previously...
Parallel-Beam Backprojection: an FPGA Implementation Optimized for (2002)
Miriam Leeser, Srdjan Coric, Eric Miller, Haiqian Yu, Marc Trepanier
Medical image processing in general and computerized tomography (CT) in particular can benefit greatly from hardware acceleration. This application domain is marked by computationally intensive...
Accurate Power Estimation for Sequential CMOS Circuits Using Graph-based Methods (2001)
We present a novel method for estimating the power of sequential CMOS circuits. Symbolic probabilistic power estimation with an enumerated state space is used to estimate the average power switched...
Design Tradeoffs in a Hardware Implementation of the k-Means Clustering Algorithm (2000)
Miriam Leeser, James Theiler, Michael Estlick, John J. Szymanski
Hyperspectral imagery provides exquisitely detailed information, but poses a serious challenge to the image analyst. Massive quantities of data must be reduced in a way that identifies useful...
James Theiler, Miriam Leeser, Michael Estlick, John J. Szymanski
Modern hyperspectral imagers can produce data cubes with hundreds of spectral channels and millions of pixels. One way to cope with this massive volume is to organize the data so that pixels with...
A Library of Parameterized Hardware Modules for Floating Point Arithmetic and Its Use (1998)
Leeser, Miriam, Belanovic, Pavle
Viewgraphs on presentation of parameterized hardware modules for floating point arithmetic and its uses.
An FPGA Implementation of the Two-Dimensional Finite-Difference Time-Domain (FDTD) Algorithm (1998)
Chen, Wang, Leeser, Miriam, Rappaport, Carey, Kosmas, Panos
Three-Dimensional Finite-Difference Time-Domain (3D FDTD) is a powerful method for modelling the electromagnetic field. The 3D FDTD buried object detection forward model is emerging as a useful...
Multimedia Macros for Portable Optimized Programs (1998)
Rojas, Juan C., Leeser, Miriam
Multimedia architectures can speed-up applications significantly when programmed manually. Optimized programs have been non-portable up to now, because of differences in instruction sets, register...
Precision Modeling and Bit-width Optimization of Floating-Point Applications (1998)
We present a floating-point precision modeling methodology that can be used to develop application adaptive arithmetic precision models for variable bit-width floating-point computing. We also...
Variable Precision Floating Point Division and Square Root (1998)
Division and square root are important operations in many high performance signal processing applications including matrix inversion, vector normalization, least squares lattice filters and Cholesky...
Dynamo: A Runtime Codesign Environment (1998)
Quinn, Heather, Leeser, Miriam, Smith-King, L. A.
Systems using Field Programmable Gate Array (FPGA) boards have been proven effective for gaining one to three orders of magnitude speed-up over systems based solely on PCs. Signal and image...
Integrating floorplanning in data-transfer based high-level synthesis (1998)
Shantanu Tarafdar, Synopsys Inc, Miriam Leeser, Zixin Yin
on Computer-Aide d Design) Modern digital systems move and process vast amounts of data. Designing good ASIC architectures for these systems requires efficient data routing and storage. A high-level...
The DT-Model: High-Level Synthesis Using Data Transfers (1998)
Shantanu Tarafdar, Miriam Leeser
We present a new model for formulating the classic HLS subproblems: scheduling, allocation, and binding. The model is unique in its use of data-transfers as the basic entity in synthesis. A data...
Cache-Sensitive Architectural Optimizations for MPEG-2 Video Decoding (1998)
Peter Soderquist, Miriam Leeser
Introduction One of the key challenges in computer architecture today is successfully integrating multimedia functionality into general-purpose microprocessors. Digital video is at the core of...
Spatial and Color Clustering on an FPGA-based Computer System (1998)
Miriam Leeser, Natasha Kitaryeva, Jill Crisman
We are mapping an image clustering algorithm onto an FPGA-based computer system. Our approach processes raw pixel data in the red, green, blue color space and generates an output image where all...
High Level Synthesis for Designing Custom Computing Hardware (1998)
Goran Doncev, Miriam Leeser, Shantanu Tarafdar
We examine the application of High Level Synthesis to FPGA based computing systems. Our experience shows that high level synthesis allows for a level of design space exploration unrealizeable with...
Midas: Using data-transfers in high-level synthesis (1998)
Shantanu Tarafdar, Miriam Leeser
Memory accesses and data-transfers are the main bottleneck in system design today. Application specific integrated circuits can address this issue, but high-level synthesis systems (HLS) -- which are...
Optimizing the Data Cache Performance of a Software MPEG-2 Video Decoder (1997)
Peter Soderquist, Miriam Leeser
Multimedia functionality has become an established component of core computer workloads. MPEG-2 video decoding represents a particularly important and computationally demanding application example....
Memory Traffic and Data Cache Behavior of an MPEG-2 Software Decoder (1997)
Peter Soderquist, Peter Soderquist, Miriam Leeser, Miriam Leeser
We investigate the impact of multimedia applications on the cache behavior of desktop systems. Specifically, we consider the memory bandwidth and data cache challenges associated with MPEG-2 software...
Floating-Point Division and Square Root: Choosing the Right Implementation (1996)
Peter Soderquist, Peter Soderquist, Miriam Leeser, Miriam Leeser
this paper is to clarify and evaluate the implementation tradeoffs at the FPU level, thus enabling designers to make informed decisions. Division and square root have long been considered minor,...
HML: An Innovative Hardware Description Language and Its Translation to VHDL (1995)
HML (Hardware ML) is an innovative hardware description language based on the functional programming language SML (Standard ML). HML is a high-order language with polymorphic types. It uses advanced...
Divide/square Root Implementations, Peter Soderquist, Peter Soderquist, Miriam Leeser, Miriam Leeser
The implementations of division and square root in the FPU's of current microprocessors are based on one of two categories of algorithms. Multiplicative techniques, exemplified by the...
Non-restoring integer square root: A case study in design by principled optimization (1994)
Miriam Leeser, Jason Hickey, Mark Aagaard
Abstract. Theorem proving techniques are particularly well suited for reasoning about arithmetic above the bit level and for relating different levels of abstraction. In this paper we show how a...
Area And Performance Tradeoffs In Floating-Point Divide And Square Root Implementations (1994)
Square Root Implementations, Square Root Implementations, Peter Soderquist, Peter Soderquist, Miriam Leeser, Miriam Leeser
ing with credit is permitted. To copy otherwise, to republish, to post on servers, to redistribute to lists, or to use any component of this work in other works, requires prior specific permission...
Non-restoring integer square root: A case study in design by principled optimization (1994)
Miriam Leeser, Jason Hickey, Mark Aagaard
Abstract. Theorem proving techniques are particularly well suited for reasoning about arithmetic above the bit level and for relating di erent levels of abstraction. In this paper we show how a...
A Theorem Proving Based Methodology for Software Verification (1993)
We have developed an effective methodology for using a proof development system to prove properties about functional programs. This methodology includes techniques such as hiding implementation...
A Theorem Proving Based Methodology for Software Verification (1993)
We have developed an effective methodology for using a proof development system to prove properties about functional programs. This methodology includes techniques such as hiding implementation...
Toward a Super Duper Hardware Tactic (1993)
Mark Aagaard Miriam, Mark Aagaard, Miriam Leeser, Miriam Leeser, Phil Windley, Phil Windley
We present techniques for automating many of the tedious aspects of hardware verification in a higher order logic theorem proving environment. We employ two complementary approaches. The first...