Rollins, Nathaniel; Wirthlin, Michael J.
Sponsorship: NASA. In a previous paper it was shown that reducing the amount of glitches in digital designs can significantly reduce the amount of dynamic power consumption. Pipelined multipliers and...
Reducing Energy in FPGA Multipliers Through Glitch Reduction (2005)
Rollins, Nathaniel; Wirthlin, Michael J.
Sponsorship: NASA Earth Science Technology Office (ESTO). While FPGAs provide exibility for performing high-performance DSP functions, they consume a significant amount of power. For arithmetic...
Evaluation of Power Costs in Applying TMR to FPGA Designs (2004)
Rollins, Nathaniel; Wirthlin, Michael J., Graham, Paul S.
Sponsorship: Los Alamos National Laboratory. Triple modular redundancy (TMR) is a technique commonly used to mitigate against design failures caused by single event upsets (SEUs). The SEU immunity...