A Scalable VLSI Architecture for Soft-Input Soft-Output Depth-First Sphere Decoding (2009)
Witte, Ernst Martin, Borlenghi, Filippo, Ascheid, Gerd, Leupers, Rainer, Meyr, Heinrich
Multiple-input multiple-output (MIMO) wireless transmission imposes huge challenges on the design of efficient hardware architectures for iterative receivers. A major challenge is soft-input...
Desiree Ottoni, Rainer Leupers
The generation of efficient addressing code is a central problem in compiling for processors with restricted addressing modes, like digital signal processors (DSPs). Offset assignment (OA) is the...
ASIP Architecture Exploration for efficient IPSec Encryption: A Case Study (2008)
Hanno Scharwaechter, David Kammler, Andreas Wieferink, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, ...
Abstract. Application Specific Instruction Processors (ASIPs) are increasingly becoming popular in the world of customized, applicationdriven System-on-Chip (SoC) designs. Efficient ASIP design...
ABSTRACT Software Synthesis and Code Generation for Signal Processing Systems £ (2008)
Shuvra S. Bhattacharyya, Rainer Leupers, Peter Marwedel
The role of software is becoming increasingly important in the implementation of DSP applications. As this trend intensifies, and the complexity of applications escalates, we are seeing an increased...
C Compiler Aided Design of Application-Specific Instruction-Set Processors Using (2008)
Von Fakultät, Elektrotechnik Informationstechnik, Oliver Wahlen, Dr. Rainer Leupers, ...
Die Deutsche Bibliothek lists this publication in the Deutsche Nationalbibliografie; detailed bibliographic data is available in the internet at
Andreas Wieferink, Malte Doerper, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tim Kogel
Current and future SoC designs will contain an increasing number of heterogeneous programmable units combined with a complex communication architecture to meet flexibility, performance and cost...
ABSTRACT Retargetable Generation of TLM Bus Interfaces for MP-SoC Platforms (2008)
Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cores combined with a...
2 Embedded-Processor Design Compiler Design Issues for Embedded Processors (2008)
The growing complexity and high efficiency requirements of embedded systems call for new code optimization techniques and architecture exploration, using retargetable C and C++ compilers. COMPILERS...
Rainer Leupers, Rwth Aachen, R. Leupers
� 18 Ph.D. students � 5 staff � Research on wireless communication systems � tight industry cooperations � origin of several EDA spin-off companies (e.g. Cadis, Axys, LISATek) � SSS group...
A Code-Generator Generator for Multi-Output Instructions (2008)
Hanno Scharwaechter, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very common in the area of...
ABSTRACT A Fast and Generic Hybrid Simulation Approach Using C Virtual Machine (2008)
Lei Gao, Stefan Kraemer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
Instruction Set Simulators (ISSes) are important tools for cross-platform software development. The simulation speed is a major concern and many approaches have been proposed to improve the...
Abstract Low-Energy DSP Code Generation Using a Genetic Algorithm (2008)
Markus Lorenz, Rainer Leupers, Peter Marwedel
This paper deals with low-energy code generation for a highly optimized digital signal processor designed for mobile communication applications. We present a genetic algorithm based code generator...
Compiler Optimizations for Media Processors (2008)
In the design of embedded systems, programmable processors gain more and more importance due to their high flexibility and potential for reuse. As a consequence, compilers for embedded processors are...
Abstract Using Compilers for Heterogeneous System Design (2008)
Rainer Leupers, Peter Marwedel
Heterogeneous systems combine both data and control processing functions. A programmable DSP core forms the central component. The design of such systems establishes a new application of compilers in...
Abstract Low-Energy DSP Code Generation Using a Genetic Algorithm (2008)
Markus Lorenz, Rainer Leupers, Peter Marwedel
This paper deals with low-energy code generation for a highly optimized digital signal processor designed for mobile communication applications. We present a genetic algorithm based code generator...
Abstract Optimized Address Assignment for DSPs with SIMD Memory Accesses £ (2008)
Markus Lorenz, David Kottmann, Steven Bashford, Rainer Leupers, Peter Marwedel
This paper deals with address assignment in code generation for digital signal processors (DSPs) with SIMD (single instruction multiple data) memory accesses. In these processorsdata are organized in...
ABSTRACT A Universal Technique for Fast and Flexible Instruction-Set Architecture Simulation (2007)
Achim Nohl, Gunnar Braun, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr, Andreas Hoffmann
In the last decade, instruction-set simulators have become an essential development tool for the design of new programmable architectures. Consequently, the simulator performance is a key factor for...
Rainer Leupers, Oliver Wahlen, Manuel Hohenauer, Tim Kogel
Abstract — Due to fast time-to-market and IP reuse requirements, an increasing amount of the functionality of embedded HW/SW systems is implemented in software. As a consequence, software...
Manuel Hohenauer, Hanno Scharwaechter, Kingshuk Karuri, Oliver Wahlen, Tim Kogel, Rainer Leupers, ...
Retargetable C compilers are key tools for efficient architecture exploration for embedded processors. In this paper we describe a novel approach to retargetable compilation based on LISA, an...
An Integrated Open Framework for Heterogeneous MPSoC Design Space Exploration (2006)
Federico Angiolini, Jianjiang Ceng, Rainer Leupers, Federico Ferrari, Cesare Ferri, Luca Benini
In recent years, increasing manufacturing density has allowed the development of Multi-Processor Systems-on-Chip (MPSoCs). Application-Specific Instruction Set Processors (ASIPs) stand out as one of...
Design and implementation of a modular and portable ieee 754 compliant floating-point unit (2006)
Kingshuk Karuri, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
Multimedia and communication algorithms from embedded system domain often make extensive use of floating-point arithmetic. Due to the complexity and expense of the floating-point hardware, final...
Integrated Verification Approach during ADL-Driven Processor Design (2006)
Anupam Chattopadhyay, Arnab Sinha, David Kammler, Ian Zhang, Rainer Leupers, Heinrich Meyr
Nowadays, Architecture Description Languages (ADLs) are getting popular to achieve quick and optimal design convergence during the development of Application Specific Instruction-Set Processors...
C Compiler Retargeting Based on Instruction Semantics Models (2005)
Ceng, Jianjiang, Hohenauer, Manuel, Leupers, Rainer, Ascheid, Gerd, Meyr, Heinrich, Braun, Gunnar
Efficient architecture exploration and design of application specific instruction-set processors (ASIPs) requires retargetable software development tools, in particular C compilers that can be...
C Compiler Retargeting Based on Instruction Semantics Models (2005)
Ceng, Jianjiang, Hohenauer, Manuel, Leupers, Rainer, Ascheid, Gerd, Meyr, Heinrich, Braun, Gunnar
Efficient architecture exploration and design of application specific instruction-set processors (ASIPs) requires retargetable software development tools, in particular C compilers that can be...
C compiler retargeting based on instruction semantics models (2005)
Jianjiang Ceng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
Efficient architecture exploration and design of application specific instruction-set processors (ASIPs) requires retargetable software development tools, in particular C compilers that can be...
Fine-grained application source code profiling for ASIP design (2005)
Kingshuk Karuri, Mohammad Abdullah, Al Faruque, Stefan Kraemer, Rainer Leupers, Gerd Ascheid, ...
Current Application Specific Instruction set Processor (ASIP) design methodologies are mostly based on iterative architecture exploration that uses Architecture Description Languages (ADLs) and...
C compiler retargeting based on instruction semantics models (2005)
Jianjiang Ceng, Manuel Hohenauer, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
Efficient architecture exploration and design of application specific instruction-set processors (ASIPs) requires retargetable software development tools, in particular C compilers that can be...
Prof Dr. -ing, Gerd Ascheid, Prof Dr, Rainer Leupers, Informatik Xi, Prof Dr, ...
This document is for internal use only. All copyrights are controlled by the supervising chair. Publications of every type are only authorized with permission of the chair. Ich versichere, daß die...
A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models (2004)
Manuel Hohenauer, Hanno Scharwaechter, Kingshuk Karuri, Oliver Wahlen, Tim Kogel, Rainer Leupers, ...
Retargetable C compilers are key tools for efficient architecture exploration for embedded processors. In this paper we describe a novel approach to retargetable compilation based on LISA, an...
Andreas Wieferink, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
Current and future SoC designs will contain an increasing number of heterogeneous programmable units combined with a complex communication architecture to meet flexibility, performance and cost...
Early iss integration into network-on-chip designs (2004)
Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
Abstract. Future signal processing SoC designs will contain an increasing number of heterogeneous programmable units combined with a complex communication architecture to meet flexibility,...
Offset Assignment Showdown: Evaluation of DSP Address Code Optimization Algorithms (2003)
Abstract. Offset assignment is a highly effective DSP address code optimization technique that has been implemented in a number of ANSI C compilers. In this paper we concentrate on a special class of...
Improving Offset Assignment through Simultaneous Variable Coalescing (2003)
Desiree Ottoni, Guilherme Ottoni, Guido Araujo, Rainer Leupers
Processor/memory co-exploration on multiple abstraction levels (2003)
Gunnar Braun, Andreas Wieferink, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr
Recently, the evolution of embedded systems has shown a strong trend towards application-specific, single-chip solutions. As a result, application-specific instruction set processors (ASIP) are more...
Tim Kogel, Malte Doerper, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
Ever increasing complexity and heterogeneity of SoC platforms require diversified on-chip communication schemes beyond the currently omnipresent shared bus architectures. To prevent time consuming...
Tim Kogel, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
Abstract — The ever increasing complexity and heterogeneity of modern System-on-Chip designs demands early consideration and exploration of architectural alternatives, which is hardly practicable...
A Generic Tool-Set for SoC Multiprocessor Debugging and Synchronization (2003)
Andreas Wieferink, Tim Kogel, Rainer Leupers, Heinrich Meyr, Achim Nohl, Andreas Hoffmann
Current and future SoC designs will contain an increasing number of programmable units. To be able to tailor and debug these processors in their system context at the highest possible overall...
Heiko Falk, Cédric Ghez, Miguel Miranda, Rainer Leupers
Abstract — This paper describes a set of novel highlevel control flow transformations for performance improvement of typical address-dominated multimedia applications. We show that these...
Compiler design issues for embedded processors (2002)
The growing complexity and high efficiency requirements of embedded systems call for new code optimization techniques and architecture exploration, using retargetable C and C++ compilers. COMPILERS...
Retargetable Compiler Technology for Embedded Systems : Tools and Applications (2001)
Leupers, Rainer, Marwedel, Peter
0-7923-7578-5
C compiler design for an industrial network processor (2001)
One important problem in code generation for embedded processors is the design of ecient compilers for ASIPs with application specic architectures. This paper outlines the design of a C compiler for...
Variable partitioning for dual memory bank dsps (2001)
DSPs with dual memory banks offer high memory bandwidth, which is required for high-performance applications. However, such DSP architectures pose problems for C compilers, which are mostly not...
Low-Energy DSP Code Generation Using a Genetic Algorithm (2001)
Markus Lorenz, Rainer Leupers, Peter Marwedel
This paper deals with low-energy code generation for a highly optimized digital signal processor designed for mobile communication applications. We present a genetic algorithm based code generator...
Optimized Address Assignment for DSPs with SIMD Memory Accesses (2001)
Markus Lorenz, David Kottmann, Steven Bashford, Rainer Leupers, Peter Marwedel
This paper deals with address assignment in code generation for digital signal processors (DSPs) with SIMD (single instruction multiple data) memory accesses. In these processorsdata are organized in...
C Compiler Design for an Industrial Network Processor (2001)
A*BDC,-*E F#2A%*%- *%&"HG?$ #>?@-%A*BDC,-*E F#2A%* $%*B.C<-,!K4H67'8I*K."N;,O) **,;,%-P*% #M K*%A"%"*)&'%M'Q!:!3**RS!S*#*T ;,-- *,U!A2&',...
Software Synthesis and Code Generation for Signal Processing Systems (2000)
Shuvra S. Bhattacharyya, Rainer Leupers, Peter Marwedel
Abstract—The role of software is becoming increasingly important in the implementation of digital signal processing (DSP) applications. As this trend intensifies, and the complexity of applications...
Software Synthesis and Code Generation for Signal Processing Systems (2000)
Shuvra S. Bhattacharyya, Rainer Leupers, Peter Marwedel
The role of software is becoming increasingly important in the implementation of DSP applications. As this trend intensifies, and the complexity of applications escalates, we are seeing an increased...
Instruction Scheduling for Clustered VLIW DSPs (2000)
Recent digital signal processors (DSPs) show a homogeneous VLIW-like data path architecture, which allows C compilers to generate efficient code. However, still some special restrictions have to be...
Code Generation for Embedded Processors (2000)
The increasing use of programmable processors as IP blocks in embedded system design creates a need for C/C++ compilers capable of generating efficient machine code. Many of today's compilers...
Graph based Code Selection Techniques for Embedded Processors (2000)
Rainer Leupers, Steven Bashford
Code selection is an important task in code generation for programmable processors, where the goal is to find an eicient mapping of machine-independent intermediate code to processor-specific machine...
Register Allocation for Common Subexpressions in DSP Data Paths (2000)
| This paper presents a new code optimization technique for DSPs with irregular data path structures. We consider the problem of generating machine code for data ow graphs with common subexpressions...
Code Selection for Media Processors with SIMD Instructions (2000)
Media processors show special instruction sets for fast execution of signal processing algorithms on different media data types. They provide SIMD instructions, capable of executing one operation on...
Software Synthesis and Code Generation for Signal Processing Systems (1999)
Shuvra S. Bhattacharyya, Rainer Leupers, Peter Marwedel
The role of software is becoming increasingly important in the implementation of DSP applications. As this trend intensifies, and the complexity of applications escalates, we are seeing an increased...
Software Synthesis and Code Generation for Signal Processing Systems (1999)
Shuvra S. Bhattacharyya, Rainer Leupers, Peter Marwedel
The role of software is becoming increasingly important in the implementation of DSP applications. As this trend intensifies, and the complexity of applications escalates, we are seeing an increased...
Function Inlining under Code Size Constraints for Embedded Processors (1999)
Rainer Leupers, Peter Marwedel
Function inlining is a compiler optimization that generally increases performance at the expense of larger code size. However, current inlining techniques do not meet the special demands in the...
Phase-Coupled Mapping of Data Flow Graphs to Irregular Data Paths (1999)
Steven Bashford, Rainer Leupers
. Many software compilers for embedded processors produce machine code of insufficient quality. Since for most applications software must meet tight code speed and size constraints, embedded software...
Software Synthesis and Code Generation for Signal Processing Systems (1999)
Shuvra S. Bhattacharyya, Rainer Leupers, Peter Marwedel
The role of software is becoming increasingly important in the implementation of DSP applications. As this trend intensifies, and the complexity of applications escalates, we are seeing an increased...
Compiler Optimizations for Media Processors (1999)
In the design of embedded systems, programmable processors gain more and more importance due to their high flexibility and potential for reuse. As a consequence, compilers for embedded processors are...
Constraint Driven Code Selection for Fixed-Point DSPs (1999)
Steven Bashford, Rainer Leupers
Fixed-point DSPs are a class of embedded processors with highly irregular architectures. This irregularity makes it difficult to generate high-quality machine code from programming languages such as...
Array Index Allocation under Register Constraints in DSP Programs (1999)
Anupam Basu, Rainer Leupers, Peter Marwedel
Code optimization for digital signal processors (DSPs) has been identified as an important new topic in system-level design of embedded systems. Both DSP processors and algorithms show special...
Steven Bashford, Rainer Leupers
Abstract. Many software compilers for embedded processors produce machine code of insu-cient quality. Since for most applications software must meet tight code speed and size constraints, embedded...
Exploiting Conditional Instructions in Code Generation for Embedded VLIW Processors (1999)
This paper presents a new code optimization technique for a class of embedded processors. Modern embedded processor architectures show deep instruction pipelines and highly parallel VLIW-like...
Software Synthesis and Code Generation for Signal Processing Systems (1999)
Shuvra S. Bhattacharyya, Rainer Leupers, Peter Marwedel
The role of software is becoming increasingly important in the implementation of DSP applications. As this trend intensifies, and the complexity of applications escalates, we are seeing an increased...
Generation of Interpretive and Compiled Instruction Set Simulators (1999)
Rainer Leupers, Johann Elste, Birger Landwehr, Birger L
Due to the large variety of different embedded processor types, retargetable software development tools, such as compilers and simulators, have received attention recently. Retargetability allows to...
Rainer Leupers, Peter Marwedel
Abstract. Design automation for embedded systems comprising both hardware and software components demands for code generators integrated into electronic CAD systems. These code generators provide the...
Optimized array index computation in DSP programs (1998)
Rainer Leupers, Anupam Basu, Peter Marwedel
Abstract | An increasing number of components in embedded systems are implemented by software running on embedded processors. This trend creates a need for compilers for embedded processors capable...
HDL-based Modeling of Embedded Processor Behavior for Retargetable Compilation (1998)
The concept of retargetability enables compiler technology to keep pace with the increasing variety of domain-specific embedded processors. In order to achieve user retargetability, powerful...
Novel Code Optimization Techniques for DSPs (1998)
Software development for DSPs is frequently a bottleneck in the system design process, due to the poor code quality delivered by many current C compilers. As a consequence, most of the DSP software...
A Uniform Optimization Technique for Offset Assignment Problems (1998)
A number of different algorithms for optimized offset assignment in DSP code generation have been developed recently. These algorithms aim at constructing a layout of local variables in memory, such...
Register-Constrained Address Computation in DSP Programs (1998)
Anupam Basu, Rainer Leupers, Peter Marwedel
This paper describes a new code optimization technique for digital signal processors (DSPs). One important characteristic of DSP algorithms are iterative accesses to data array elements within loops....
Optimized Array Index Computation in DSP Programs (1998)
Rainer Leupers, Anupam Basu, Peter Marwedel
An increasing number of components in embedded systems are implemented by software running on embedded processors. This trend creates a need for compilers for embedded processors capable of...
Retargetable Code Generation based on Structural Processor Descriptions (1998)
Rainer Leupers, Peter Marwedel
. Design automation for embedded systems comprising both hardware and software components demands for code generators integrated into electronic CAD systems. These code generators provide the...
Register-Constrained Address Computation in DSP Programs (1998)
Anupam Basu Rainer, Rainer Leupers, Peter Marwedel
This paper describes a new code optimization technique for digital signal processors #DSPs#. One important characteristic of DSP algorithms are iterative accesses to data array elements within loops....
Optimized array index computation in DSP programs (1998)
Rainer Leupers, Anupam Basu, Peter Marwedel
Abstract | An increasing number of components in embedded systems are implemented by software running on embedded processors. This trend creates a need for compilers for embedded processors capable...
Register-Constrained Address Computation in DSP Programs (1998)
Basu, Anupam, Leupers, Rainer, Marwedel, Peter
This paper describes a new code optimization technique for digital signal processors (DSPs). One important characteristic of DSP algorithms are iterative accesses to data array elements within loops....
Retargetable Code Generation based on Structural Processor Descriptions (1998)
Leupers, Rainer, Marwedel, Peter
Design automation for embedded systems comprising both hardware and software components demands for code generators integrated into electronic CAD systems. These code generators provide the necessary...
Optimized Array Index Computation in DSP Programs (1998)
Basu, Anupam, Leupers, Rainer, Marwedel, Peter
An increasing number of components in embedded systems are implemented by software running on embedded processors. This trend creates a need for compilers for embedded processors capable of...
Novel Code Optimization Techniques for DSPs (1998)
Software development for DSPs is frequently a bottleneck in the system design process, due to the poor code quality delivered by many current C compilers. As a consequence, most of the DSP software...
Retargierbare Codeerzeugung für digitale Signalprozessoren (1998)
Digitale Signalprozessoren (DSPs) sind programmierbare Bausteine mit speziellen, für rechenintensive Anwendungen optimierten Befehlssätzen, welche vor allem zur Signalverarbeitung unter...
Retargetable Generation of Code Selectors from HDL Processor Models (1997)
Rainer Leupers, Peter Marwedel
Besides high code quality, a primary issue in embedded code generation is retargetability of code generators. This paper presents techniques for automatic generation of code selectors from externally...
Retargetable Compilers for Embedded DSPs (1997)
Rainer Leupers, Peter Marwedel
Programmable devices are a key technology for the design of embedded systems, such as in the consumer electronics market. Processor cores are used as building blocks for more and more embedded system...
Retargetable compilers for embedded DSPs (1997)
Rainer Leupers, Peter Marwedel
Programmable devices are a key technology for the design of embedded systems, such as in the consumer electronics market. Processor cores are used as building blocks for more and more embedded system...
Retargetable Generation of Code Selectors from HDL Processor Models (1997)
Rainer Leupers, Peter Marwedel
Besides high code quality, a primary issue in embedded code generation is retargetability of code generators. This paper presents techniques for automatic generation of code selectors from externally...
Time-constrained code compaction for DSPs (1997)
Rainer Leupers, Peter Marwedel
Abstract{DSP algorithms in most cases are subject to hard real-time constraints. In case of programmable DSP processors, meeting those constraints must be ensured by appropriate code generation...
Retargetable generation of code selectors from HDL processor models (1997)
Rainer Leupers, Peter Marwedel
Abstract{Besides high code quality, a primary issue in embedded code generation is retargetability of code generators. This paper presents techniques for automatic generation of code selectors from...
Time-Constrained Code Compaction for DSPs (1997)
Rainer Leupers, Peter Marwedel
This paper addresses instruction-level parallelism in code generation for DSPs. In presence of potential parallelism, the task of code generation includes code compaction, which parallelizes...
Formale Methoden in der Codeerzeugung für digitale Signalprozessoren (1997)
Leupers, Rainer, Marwedel, Peter
Der Bereich HW/SW-Codesign für eingebettete Systeme umfaßt neben Methoden zur HW/SW-Partitionierung und Hardwaresynthese notwendigerweise auch Techniken zur Codeerzeugung für eingebettete...
Optimierende Compiler für DSPs: Was ist verfügbar? (1997)
Leupers, Rainer, Marwedel, Peter
Die Softwareentwicklung für eingebettete Prozessoren findet heute größtenteils noch auf Assemblerebene statt. Der Grund für diesen langfristig wohl unhaltbaren Zustand liegt in der mangelnden...
Retargetable Compilers for Embedded DSPs (1997)
Leupers, Rainer, Marwedel, Peter
Programmable devices are a key technology for the design of embedded systems, such as in the consumer electronics market. Processor cores are used as building blocks for more and more embedded system...
Retargetable Generation of Code Selectors from HDL Processor Models (1997)
Leupers, Rainer, Marwedel, Peter
Besides high code quality, a primary issue in embedded code generation is retargetability of code generators. This paper presents techniques for automatic generation of code selectors from externally...
Time-Constrained Code Compaction for DSPs (1997)
Leupers, Rainer, Marwedel, Peter
This paper addresses instruction-level parallelism in code generation for DSPs. In presence of potential parallelism, the task of code generation includes code compaction, which parallelizes...
Instruction selection for embedded DSPs with complex instructions (1996)
Rainer Leupers, Peter Marwedel
email � leupersjmarwedel�ls12.informatik.uni�dortmund.de Abstract�We address the problem of instruction selec� tion in code generation for embedded digital signal pro� cessors. Recent...
Algorithms for Address Assignment in DSP Code Generation (1996)
Rainer Leupers, Peter Marwedel
This paper presents DSP code optimization techniques, which originate from dedicated memory address generation hardware. We define a generic model of DSP address generation units. Based on this...
Instruction Selection for Embedded DSPs with Complex Instructions (1996)
Rainer Leupers, Peter Marwedel
We address the problem of instruction selection in code generation for embedded digital signal processors. Recent work has shown that this task can be efficiently solved by tree covering with dynamic...
Instruction-Set Modelling for ASIP Code Generation (1996)
Rainer Leupers, Peter Marwedel
A main objective in code generation for ASIPs is to develop retargetable compilers in order to permit exploration of different architectural alternatives within short turnaround time. Retargetability...
Instruction selection for embedded DSPs with complex instructions (1996)
Rainer Leupers, Peter Marwedel
Abstract{We address the problem of instruction selection in code generation for embedded digital signal processors. Recent work has shown that this task can be efciently solved bytree covering with...
Algorithms for address assignment in DSP code generation (1996)
Rainer Leupers, Peter Marwedel
Abstract { This paper presents DSP code optimization techniques, which originate from dedicated memory address generation hardware. We de ne a generic model of DSP address generation units. Based on...
Time-constrained Code Compaction for DSPs (1995)
Rainer Leupers, Peter Marwedel
DSP algorithms in most cases are subject to hard real-time constraints. In case of programmable DSP processors, meeting those constraints must be ensured by appropriate code generation techniques....
A BDD-based Frontend for Retargetable Compilers (1995)
Rainer Leupers, Peter Marwedel
this paper we present a unified frontend for retargetable compilers that performs analysis of the target processor model. Our approach bridges the gap between structural and behavioral processor...
Using Compilers for Heterogeneous System Design (1995)
Rainer Leupers, Peter Marwedel
Heterogeneous systems combine both data and control processing functions. A programmable DSP core forms the central component. The design of such systems establishes a new application of compilers in...
Retargetable assembly code generation by bootstrapping (1994)
Rainer Leupers, Wolfgang Schenk, Peter Marwedel
Abstract{In a hardware/software codesign environment compilers are needed that map software components of a partitioned system behavioral description onto aprogrammable processor. Since the processor...
Microcode Generation for Flexible Parallel Target Architectures (1994)
Rainer Leupers, Wolfgang Schenk, Peter Marwedel
: Advanced architectural features of microprocessors like instruction level parallelism and pipelined functional hardware units require code generation techniques beyond the scope of traditional...
Methods For Retargetable Dsp Code Generation (1994)
Rainer Leupers, Ralf Niemann, Peter Marwedel
Efficient embedded DSP system design requires methods of hardware/software codesign. In this contribution we focus on software synthesis for partitioned system behavioral descriptions. In previous...
Instruction Set Extraction From Programmable Structures (1994)
Rainer Leupers, Peter Marwedel
Due to the demand for more design flexibility and design reuse, ASIPs have emerged as a new important design style in the area of DSP systems. In order to obtain efficient hardware/software...
Retargetable Assembly Code Generation by Bootstrapping (1994)
Rainer Leupers, Wolfgang Schenk, Peter Marwedel
In a hardware/software codesign environment compilers are needed that map software components of a partitioned system behavioral description onto a programmable processor. Since the processor...
The MIMOLA Language, Version 4.1 (1994)
Lehrstuhl Informatik Xii, Steven Bashford, Ulrich Bieker, Berthold Harking, Rainer Leupers, Peter Marwedel, ...
This report describes the computer hardware description language MIMOLA 4.1 (machine independent microprogramming language). MIMOLA 4.1 is the common input language for a variety of CAD tools for the...
Retargetable Assembly Code Generation by Bootstrapping (1993)
Rainer Leupers, Wolfgang Schenk
In a hardware/software codesign environment compilers are needed that map software components of a partitioned system behavior description onto a programmable processor. Since the processor structure...
Resistance Extraction using a Routing Algorithm (1993)
This paper presents a new algorithm for calculating the resistance of an arbitrarily shaped polygon within a VLSI mask layout analysis program. In contrast to earlier approaches no polygon...
Software Synthesis and Code Generation for Signal Processing Systems (1988)
Shuvra S. Bhattacharyya, Rainer Leupers, Peter Marwedel
The role of software is becoming increasingly important in the implementation of DSP applications. As this trend intensifies, and the complexity of applications escalates, we are seeing an increased...
Shuvra S. Bhattacharyya, Rainer Leupers, Peter Marwedel
The role of software is becoming increasingly important in the implementation of DSP applications. As this trend intensifies, and the complexity of applications escalates, we are seeing an increased...