Bitslice-Datapath Architecture for Multimedia Processing and Power-Consumption Reduction (2007)
Satoru Shirakawa, Koji Inoue, Kazuaki Murakami
This paper proposes a new processor architecture, called "bitslice-datapath architecture, " and discusses its effectiveness. The datapath (registers and functional units) of...
Hyperscalar Processor Architecture (in Japanese (1994)
Kazuaki Murakami, Hiroshi Miyajima, Yasuhiko Saitoh, Tetsuo Hironaka, Satoru Shirakawa
This paper describes a novel processor architecture, called hyperscalar processor architecture, which encompasses the advantages of superscalar, VLIW, and vector processor architectures and exculdes...
Hyperscalar Processor Architecture (in Japanese (1994)
Kazuaki Murakami, Hiroshi Miyajima, Yasuhiko Saitoh, Tetsuo Hironaka, Satoru Shirakawa
This paper describes a novel processor architecture, called hyperscalar processor architecture, which encompasses the advantages of superscalar, VLIW, and vector processor architectures and exculdes...
Hyperscalar Processor Architecture (in Japanese (1994)
Kazuaki Murakami, Hiroshi Miyajima, Yasuhiko Saitoh, Tetsuo Hironaka, Satoru Shirakawa
This paper describes a novel processor architecture, called hyperscalar processor architecture, which encompasses the advantages of superscalar, VLIW, and vector processor architectures and exculdes...
Hyperscalar Processor Architecture (1994)
Kazuaki Murakami Hiroshi, Hiroshi Miyajima, Yasuhiko Saitoh, Tetsuo Hironaka, Satoru Shirakawa
This paper describes a novel processor architecture, called hyperscalar processor architecture, which encompasses the advantages of superscalar, VLIW, and vector processor architectures and exculdes...