Designer von neuen Prozessoren und von Software für Systems-on-Chip benötigen eine verlässliche Methodik und entsprechende Werkzeuge zur Erzeugung von schnellen Prozessormodellen, die die...
Generating production quality software development tools using a machine description language (2001)
Andreas Hoffmann, Achim Nohl, Stefan Pees, Gunnar Braun, Heinrich Meyr
This paper presents a methodology to automatically generate production quality software development tools for programmable architectures using the machine description language LISA. Various...
Stefan Pees, Andreas Hoffmann, Heinrich Meyr
This paper presents a methodology to retarget the technique of compiled simulation for Digital Signal Processors (DSPs) using the modeling language LISA. In the past, the principle of compiled...
Retargetable compiled simulation of embedded processors using a machine description language (2000)
Stefan Pees, Andreas Hoffmann, Heinrich Meyr
Fast processor simulators are needed for the software development ofembedded processors, for HW/SW cosimulation systems and for profiling and design of application specific processors. Such fast...
Stefan Pees, Andreas Hoffmannl, Vojin Zivojnovic, Heinrich Meyrl
Abstract- This paper presents the machine de-scription language LISA for the generation of bit-and cycle accurate models of DSP processors. Based on a behavioral operation description, the...
Stefan Pees, Andreas Hoffmann, Vojin Zivojnovic, Heinrich Meyr
This paper presents the machine description language LISA for the generation of bitand cycle accurate models of DSP processors. Based on a behavioral operation description, the architectural details...
On Core and More: A Design Perspective for Systems-on-a-Chip (1997)
Stefan Pees, Martin Vaupel, Vojin Zivojnovic, Heinrich Meyr, Martin Vaupel Vojin, Zivojnovi'c Heinrich Meyr
In this survey, key drivers in design methodology are provided that enable successful design of systems-on-a-chip for the highly competitive telecommunications market. Main components of a design...
Fast Simulation of the TI TMS320C54x DSP (1997)
Stefan Pees, Vojin Zivojnovic, Andreas Ropers, Heinrich Meyr
In this paper a new technique for fast simulation of pipelined digital signal processors (DSPs) is presented. In contrast to the existing timed and untimed instruction set simulators which use the...
DSP Processor/Compiler Co-Design: A Quantitative Approach (1996)
Vojin Zivojnovic, Stefan Pees, Christian Schläger, Markus Willems, Rainer Schoenen, Heinrich Meyr
In the paper the problem of processor/compiler codesign for digital signal processing and embedded systems is discussed. The main principle we follow is the top-down approach characterized by...
LISA - Machine Description Language and Generic Machine Model for HW/SW Co-Design (1996)
Vojin Zivojnovic, Stefan Pees, Heinrich Meyr
In the paper a new machine description language is presented. The new language LISA, and its generic machine model are able to produce bit- and cycle/phase-accurate processor models covering the...