Takeshi Ikenaga

Publication List Details

Period

1996 - 2009

Number

43

Co-Authors

High-Throughput Decoder for Low-Density Parity-Check Code (2009)

Tatsuyuki Ishikawa, Kazunori Shimizu, Takeshi Ikenaga, Satoshi Goto

Abstract — We have designed and implemented the LDPC decoder chip with memory-reduction method to achieve high-throughput and practical chip size. The decoder decodes (3,6)-2304bit regular LDPC...

An MRF Model Based Algorithm of Triangular Shape Object Detection in Color Images (2008)

Yangxing Liu, Satoshi Goto, Takeshi Ikenaga

Triangular shape object detection in color images is an important issue in computer vision. However, there are few reports on this matter. In this paper, we proposed a novel approach, which combines...

PAPER Special Issue on Mobile Multimedia Communications Performance Evaluation of Channel Switching Scheme for Packet Data Transmission in Radio Network Controller (2008)

Yoshiaki Ohta, Student Member, Takeshi Ikenaga, Kenji Kawahara, Yuji Oie, Regular Members

SUMMARY W-CDMA (Wideband-CDMA) is expected to play a significant role in the radio access technology of third-generation mobile telecommunication systems. In second-generation systems, voice traffic...

Server-Based Inter-Domain QoS Routing: Cost Evaluation and Decision Enforcement Server-Based Inter-Domain QoS Routing: Cost Evaluation and Decision Enforcement (2008)

Manzoor Hashmani, Koichi Tajima, Junichiro Sueishi, Mikio Yoshida, Takeshi Ikenaga, Yuji Oie

multiple available routes traversing multiple domains) simply on the basis of hop count does neither ensure optimal resource utilization nor SLA fulfillment. Although some schemes (BGP-4) provide...

Algorithms implemented in hardware, VLSI (2008)

Zhenyu Liu, Yang Song, Takeshi Ikenaga, Satoshi Goto

Many parallel Fast Fourier Transform (FFT) algorithms adopt multiple stages architecture to increase performance. However, data permutation between stages consumes volume memory and processing time....

Low-Power partial distortion sorting fast motion estimation algorithms and VLSI (2008)

Yang Song, Takeshi Ikenaga, Satoshi Goto

Abstract — This paper presents an enhanced partial distortion sorting (EPDS) fast motion estimation (ME) algorithm which is based on the previous partial distortion sorting (PDS) algorithm....

Adaptive Search Range Algorithms for Variable Block Size Motion Estimation in H.264/AVC (2008)

CHEN, Zhenxing, SONG, Yang, IKENAGA, Takeshi, GOTO, Satoshi

Comparing with search pattern motion estimation (ME) algorithms, adaptive search range (ASR) algorithms are more fundamental, regular and flexible. In variable block size motion estimation (VBSME),...

Low Power LDPC Code Decoder Architecture Based on Intermediate Message Compression Technique (2008)

SHIMIZU, Kazunori, TOGAWA, Nozomu, IKENAGA, Takeshi, GOTO, Satoshi

Reducing the power dissipation for LDPC code decoder is a major challenging task to apply it to the practical digital communication systems. In this paper, we propose a low power LDPC code decoder...

A High-Speed Design of Montgomery Multiplier (2008)

FAN, Yibo, IKENAGA, Takeshi, GOTO, Satoshi

With the increase of key length used in public cryptographic algorithms such as RSA and ECC, the speed of Montgomery multiplication becomes a bottleneck. This paper proposes a high speed design of...

Parallel Improved HDTV720p Targeted Propagate Partial SAD Architecture for Variable Block Size Motion Estimation in H.264/AVC (2008)

HUANG, Yiqing, LIU, Zhenyu, SONG, Yang, GOTO, Satoshi, IKENAGA, Takeshi

One hardware efficient and high speed architecture for variable block size motion estimation (VBSME) in H.264 is presented in this paper. By improving the pipeline structure and processing element...

Macroblock Feature Based Complexity Reduction for H.264/AVC Motion Estimation (2008)

HUANG, Yiqing, LIU, Qin, IKENAGA, Takeshi

In H.264/AVC standard, many new techniques such as variable block size (VBS) and multiple reference frame (MRF) are used in motion estimation (ME) part to achieve superior coding performance....

Variable Block Size Motion Vector Retrieval Schemes for H.264 Inter Frame Error Concealment (2008)

WANG, Lei, WANG, Jun, GOTO, Satoshi, IKENAGA, Takeshi

With the ubiquitous application of Internet and wireless networks, H.264 video communication becomes more and more common. However, due to the high-efficiently predictive coding and the variable...

Standard Deviation and Intra Prediction Mode Based Adaptive Spatial Error Concealment (SEC) in H.264/AVC (2008)

WANG, Jun, WANG, Lei, IKENAGA, Takeshi, GOTO, Satoshi

Transmission of compressed video over error prone channels may result in packet losses or errors, which can significantly degrade the image quality. Therefore an error concealment scheme is applied...

Reconfigurable Variable Block Size Motion Estimation Architecture for Search Range Reduction Algorithm (2008)

FAN, Yibo, IKENAGA, Takeshi, GOTO, Satoshi

Variable Block Size Motion Estimation (VBSME) costs a lot of computation during video coding. Search range reduction algorithm is widely used to reduce computational cost of motion estimation....

A 41 mW VGA@30 fps Quadtree Video Encoder for Video Surveillance Systems (2008)

LIU, Qin, HIRATSUKA, Seiichiro, SHIMIZU, Kazunori, USHIKI, Shinsuke, GOTO, Satoshi, IKENAGA, Takeshi

Video surveillance systems have a huge market, as indicated by the number of installed cameras, particularly for low-power systems. In this paper, we propose a low-power quadtree video encoder for...

An Unequal Secure Encryption Scheme for H.264/AVC Video Compression Standard (2008)

FAN, Yibo, WANG, Jidong, IKENAGA, Takeshi, TSUNOO, Yukiyasu, GOTO, Satoshi

H.264/AVC is the newest video coding standard. There are many new features in it which can be easily used for video encryption. In this paper, we propose a new scheme to do video encryption for...

Edge Block Detection and Motion Vector Information Based Fast VBSME Algorithm (2008)

LIU, Qin, HUANG, Yiqing, GOTO, Satoshi, IKENAGA, Takeshi

Compared with previous standards, H.264/AVC adopts variable block size motion estimation (VBSME) and multiple reference frames (MRF) to improve the video quality. Full search motion estimation...

Content-Aware Fast Motion Estimation for H.264/AVC (2008)

LIU, Zhenyu, GOTO, Satoshi, IKENAGA, Takeshi

The key to high performance in video coding lies on efficiently reducing the temporal redundancies. For this purpose, H.264/AVC coding standard has adopted variable block size motion estimation on...

A High Performance Partially-Parallel Irregular LDPC Decoder Based on Sum-Delta Message Passing Schedule (2008)

JI, Wen, ABE, Yuta, IKENAGA, Takeshi, GOTO, Satoshi

In this paper, we propose a partially-parallel irregular LDPC decoder based on IEEE 802.11n standard targeting high throughput and small area applications. The design is based on a novel sum-delta...

High Throughput VLSI Architecture of a Fast Mode Decision Algorithm for H.264/AVC Intra Encoding (2008)

ZHANG, Tianruo, TIAN, Guifen, IKENAGA, Takeshi, GOTO, Satoshi

Intra coding in H.264/AVC has significantly enhanced video compression efficiency. However, computation complexity increases by the rate-distortion (RD) based mode decision. This paper proposes a...

Efficient Fully-Parallel LDPC Decoder Design with Improved Simplified Min-Sum Algorithms (2007)

WANG, Qi, SHIMIZU, Kazunori, IKENAGA, Takeshi, GOTO, Satoshi

In this paper we introduce an area and power efficient fully-parallel LDPC decoder design, which keeps the BER performance while consuming less hardware resources and lower power compared with...

Lossless VLSI Oriented Full Computation Reusing Algorithm for H.264/AVC Fractional Motion Estimation (2007)

SHAO, Ming, LIU, Zhenyu, GOTO, Satoshi, IKENAGA, Takeshi

Fractional Motion Estimation (FME) is an advanced feature adopted in H.264/AVC video compression standard with quarter-pixel accuracy. Although FME could gain considerably higher encoding efficiency,...

Lossy Strict Multilevel Successive Elimination Algorithm for Fast Motion Estimation (2007)

SONG, Yang, LIU, Zhenyu, IKENAGA, Takeshi, GOTO, Satoshi

This paper presents a simple and effective method to further reduce the search points in multilevel successive elimination algorithm (MSEA). Because the calculated sea values of those best matching...

Low-Power Partial Distortion Sorting Fast Motion Estimation Algorithms and VLSI Implementations (2007)

SONG, Yang, LIU, Zhenyu, IKENAGA, Takeshi, GOTO, Satoshi

This paper presents two hardware-friendly low-power oriented fast motion estimation (ME) algorithms and their VLSI implementations. The basic idea of the proposed partial distortion sorting (PDS)...

Geometrical, Physical and Text/Symbol Analysis Based Approach of Traffic Sign Detection System (2007)

LIU, Yangxing, IKENAGA, Takeshi, GOTO, Satoshi

Traffic sign detection is a valuable part of future driver support system. In this paper, we present a novel framework to accurately detect traffic signs from a single color image by analyzing...

Content-Based Complexity Reduction Methods for MPEG-2 to H.264 Transcoding (2007)

LI, Shen, LI, Lingfeng, IKENAGA, Takeshi, ISHIWATA, Shunichi, MATSUI, Masataka, GOTO, Satoshi

The coexistence of MPEG-2 and its powerful successor H.264/AVC has created a huge need for MPEG-2/H.264 video transcoding. However, a traditional transcoder where an MPEG-2 decoder is simply cascaded...

A Contour-Based Robust Algorithm for Text Detection in Color Images (2006)

LIU, Yangxing, GOTO, Satoshi, IKENAGA, Takeshi

Text detection in color images has become an active research area in the past few decades. In this paper, we present a novel approach to accurately detect text in color images possibly with a complex...

A Fine-Grain Scalable and Low Memory Cost Variable Block Size Motion Estimation Architecture for H.264/AVC (2006)

LIU, Zhenyu, SONG, Yang, IKENAGA, Takeshi, GOTO, Satoshi

One full search variable block size motion estimation (VBSME) architecture with integer pixel accuracy is proposed in this paper. This proposed architecture has following features: (1) Through...

A VLSI Architecture for Variable Block Size Motion Estimation in H.264/AVC with Low Cost Memory Organization (2006)

SONG, Yang, LIU, Zhenyu, IKENAGA, Takeshi, GOTO, Satoshi

A one-dimensional (1-D) full search variable block size motion estimation (VBSME) architecture is presented in this paper. By properly choosing the partial sum of absolute differences (SAD) registers...

Power-Efficient LDPC Decoder Architecture Based on Accelerated Message-Passing Schedule (2006)

SHIMIZU, Kazunori, ISHIKAWA, Tatsuyuki, TOGAWA, Nozomu, IKENAGA, Takeshi, GOTO, Satoshi

In this paper, we propose a power-efficient LDPC decoder architecture based on an accelerated message-passing schedule. The proposed decoder architecture is characterized as follows: (i) Partitioning...

A Hardware Implementation of a Content-Based Motion Estimation Algorithm for Real-Time MPEG-4 Video Coding (2006)

LI, Shen, IKENAGA, Takeshi, TAKEDA, Hideki, MATSUI, Masataka, GOTO, Satoshi

Power efficiency and real-time processing capability are two major issues in today's mobile video applications. We proposed a novel Motion Estimation (ME) engine for power-efficient real-time MPEG-4...

Partially-Parallel LDPC Decoder Achieving High-Efficiency Message-Passing Schedule (2006)

SHIMIZU, Kazunori, ISHIKAWA, Tatsuyuki, TOGAWA, Nozomu, IKENAGA, Takeshi, GOTO, Satoshi

In this paper, we propose a partially-parallel LDPC decoder which achieves a high-efficiency message-passing schedule. The proposed LDPC decoder is characterized as follows: (i) The column operations...

Scalable VLSI Architecture for Variable Block Size Integer Motion Estimation in H.264/AVC (2006)

SONG, Yang, LIU, Zhenyu, GOTO, Satoshi, IKENAGA, Takeshi

Because of the data correlation in the motion estimation (ME) algorithm of H.264/AVC reference software, it is difficult to implement an efficient ME hardware architecture. In order to make parallel...

A VLSI Array Processing Oriented Fast Fourier Transform Algorithm and Hardware Implementation (2005)

LIU, Zhenyu, SONG, Yang, IKENAGA, Takeshi, GOTO, Satoshi

Many parallel Fast Fourier Transform (FFT) algorithms adopt multiple stages architecture to increase performance. However, data permutation between stages consumes volume memory and processing time....

Reconfigurable Adaptive FEC System Based on Reed-Solomon Code with Interleaving (2005)

SHIMIZU, Kazunori, TOGAWA, Nozomu, IKENAGA, Takeshi, GOTO, Satoshi

This paper proposes a reconfigurable adaptive FEC system based on Reed-Solomon (RS) code with interleaving. In adaptive FEC schemes, error correction capability t is changed dynamically according to...

Content-Based Motion Estimation with Extended Temporal-Spatial Analysis (2005)

LI, Shen, JIANG, Yong, IKENAGA, Takeshi, GOTO, Satoshi

In adaptive motion estimation, spatial-temporal correlation based motion type inference has been recognized as an effective way to guide the motion estimation strategy adjustment according to video...

A Highly Parallel Architecture for Deblocking Filter in H.264/AVC (2005)

LI, Lingfeng, GOTO, Satoshi, IKENAGA, Takeshi

This paper presents a highly parallel architecture for deblocking filter in H.264/AVC. We adopt various parallel schemes in memory sub-system and datapath. A 2-dimensional parallel memory scheme is...