Hideharu Amano, Masayasu Suzuki, Takeshi Inuo, Hirokazu Kami, Taro Fujii
Techniques for virtual hardware on a dynamic
TITAC–2: An asynchronous 32-bit microprocessor (2008)
Motokazu Ozawa, Kuwako Imai, Masashi Masashi, Taro Fujii, Izumi Fukasaku, Yoichiro Ueno, ...
based on Scalable-Delay-Insensitive model
TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model
Akihiro Takamura, Masashi Kuwako, Masashi Imai, Taro Fujii, Motokazu Ozawa, Izumi Fukasaku, ...
Asynchronous design has a potential of solving many difficulties, such as clock skew and power consumption, which synchronous counterpart suffers with current and future VLSI technologies. This paper...