Overview of the JUMP-1, an MPP Prototype for General-Purpose Parallel Computations (2008)
Kei Hiraki, Hideharu Amano, Morihiro Kuga, Toshinori Sueyoshi, Tomohiro Kudoh, Hironori Nakajo, ...
this paper, we discuss the importance of flexible distributed shared memory in a MPP system for general-purpose computations. The main features of JUMP-1 memory system are: 1. Flexible...
An Embedded Reconfigurable IP Core with Variable Grain Logic Cell Architecture (2008)
Motoki Amagasaki, Ryoichi Yamaguchi, Masahiro Koga, Masahiro Iida, Toshinori Sueyoshi
Reconfigurable logic devices (RLDs) are classified as the fine-grained or coarse-grained type based on their basic logic cell architecture. In general, each architecture has its own advantage....
A Novel Technique to Design Energy-Efficient Contexts for Reconfigurable Logic Devices (2007)
SHINOHARA, Hiroshi, MONJI, Hideaki, IIDA, Masahiro, SUEYOSHI, Toshinori
High power consumption is a constraining factor for the growth of programmable logic devices. We propose two techniques in order to reduce power consumption. The first is a technique for creating...
SELF-SIMILAR PROPERTIES UNDER THE BANDWIDTH RESTRAINMENT (2006)
Takuo Nakashima, Toshinori Sueyoshi
Abstract. The scale-invariant burstiness or self-similarity has been found in real networks. Relation between self-similarity and networks and/or system parameter is the center of discussion in the...
VDEC IPプロジェクトの成果IPとその利用について (2003)
安浦, 寛人, 末吉, 敏則, 久我, 守弘, 柳澤, 政生, 弘中, 哲夫, Yasuura, Hiroto, ...
平成１２年度より3年間、東京大学大規模集積システム設計教育研究センター(VDEC) のIP 開発プロジェクトの課題の一つとして、プロセッサコアIP...