Viktor K. Prasanna

MATLAB/Simulink Based Hardware/Software Co-Simulation for Designing Using FPGA Configured Soft Processors (2009)

Architectures that implement the Internet Protocol Security (IPSec) standard have to meet the enormous computing demands of cryptographic algorithms. In addition, IPSec architectures have to be...

Adaptive Allocation of Independent Tasks to Maximize Throughput (2009)

FPGA configured soft processors are an attractive choice for implementing many embedded systems. For application development using these soft processors, the users can execute portions of the...

ModelML: a Markup Language for Automatic Model Synthesis (2009)

Abstract—In this paper, we consider the task allocation problem for computing a large set of equal-sized independent tasks on a heterogeneous computing system where the tasks initially reside on a...

Cong Zhang, Amol Bakshi, Viktor K. Prasanna

Domain-specific modeling has become a popular way of designing and developing systems. It generally involves a systematic use of a set of object-oriented models to represent various facets of a...

TIME AND ENERGY EFFICIENT VITERBI DECODING USING FPGAS ∗ (2009)

Software Toolchain for Large-Scale RE-NFA Construction on FPGA (2009)

State-of-the-art FPGAs integrate multi-million gate configurable logic and heterogeneous hardware components. They are an attractive choice for implementing Viterbi decoders. As more emphasis is...

Viktor K. Prasanna

We present a software toolchain for constructing large-scale regular expression matching (REM) on FPGA. The software automates the conversion of regular expressions into compact and high-performance...

Software Toolchain for Large-Scale RE-NFA Construction on FPGA (2009)

Viktor K. Prasanna

We present a software toolchain for constructing large-scale regular expression matching (REM) on FPGA. The software automates the conversion of regular expressions into compact and high-performance...

Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores (2008)

Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna

Abstract—Recently, it has become possible to implement floating-point cores on field-programmable gate arrays (FPGAs) to provide acceleration for the myriad applications that require...

DOSA: Design Optimizer for Scientific Applications ∗ (2008)

David A. Bader, Viktor K. Prasanna

In this work, we propose an application composition system (ACS) that allows design-time exploration and automatic run-time optimizations so that we relieve application programmers and compiler...

Appears in the Proceedings of the 7 ¢¡ IEEE Intnl. Symposium on High Performance Distributed Computing (HPDC 1998)1 Adaptive Communication Algorithms for Distributed Heterogeneous Systems (2008)

Prashanth B. Bhat, Viktor K. Prasanna

Heterogeneous network-based systems are emerging as attractive computing platforms for HPC applications. This paper discusses fundamental research issues that must be addressed to enable...

A Framework for Energy Efficient Design of Multi-Rate Applications using Hybrid Reconfigurable Systems (2008)

Junction Tree Decomposition for Parallel Exact Inference ∗ (2008)

Abstract. Hybrid reconfigurable systems integrate DSPs and general purpose processors with an FPGA fabric. These systems may support features such as efficient start-up and shut-down, dynamic voltage...

Yinglong Xia, Viktor K. Prasanna

We present a junction tree decomposition based algorithm for parallel exact inference. This is a novel parallel exact inference method for evidence propagation in an arbitrary junction tree. If...

Maximum Data Gathering in Networked Sensor Systems (2008)

An Algorithm Designer’s Workbench for Platform FPGAs ⋆ (2008)

We focus on data gathering problems in energy-constrained networked sensor systems. We study store-and-gather problems where data are locally stored at the sensors before the data gathering starts,...

Pipelined Datapath for an IEEE-754 64-Bit Floating-Point Jacobi Solver (2008)

Abstract. Growing gate density, availability of embedded multipliers and memory, and integration of traditional processors are some of the key advantages of Platform FPGAs. Such FPGAs are attractive...

Gerald R. Morris, Viktor K. Prasanna

Solving linear equations is essential for certain embedded applications such as adaptive beam forming and synthetic aperture radar. When direct methods like Cholesky factorization are not viable, it...

SPE 99983 A Service Oriented Data Composition Architecture for Integrated Asset Management (2008)

Ramakrishna Soma, Amol Bakshi, Abdollah Orangi, Viktor K. Prasanna, Will Da Sie

This paper was selected for presentation by an SPE Program Committee following review of information contained in an abstract submitted by the author(s). Contents of the paper, as presented, have not...

COMA: A COoperative MAnagement Scheme for Energy Efficient Implementation of Real-Time Operating Systems on FPGA Based Soft Processors (2008)

Abstract Area and Time Efficient Implementations of Matrix Multiplication on FPGAs ∗ (2008)

FPGA based soft processors are an attractive choice for implementing many embedded systems. As real-time operating systems are adopted in the development of many applications using soft processors,...

Ju-wook Jang, Viktor K. Prasanna

We develop new algorithms and architectures for matrix multiplication on configurable hardware. These designs significantly reduce the latency as well as the area. Our designs improve the previous...

This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS 1 Data Gathering with Tunable Compression (2008)

Yang Yu, Bhaskar Krishnamachari, Viktor K. Prasanna

Abstract — We study the problem of constructing a data gathering tree over a wireless sensor network in order to minimize the total energy for compressing and transporting information from a set of...

Creating Parameterized and Energy-Efficient System Generator Designs ∗ (2008)

Jingzhao Ou, Seonil Choi, Gokul Govindu, Viktor K. Prasanna

MATLAB/Simulink based system-level tools are becoming popular for FPGA designs these days. One major advantage offered by these tools is that the designer can make use of the ability of...

Enabling Scope-Based Interactions in Sensor Network Macroprogramming (2008)

Luca Mottola, Animesh Pathak, Amol Bakshi, Viktor K. Prasanna, Gian Pietro Picco

Wireless sensor networks are increasingly employed to develop sophisticated applications where heterogeneous nodes are deployed, and multiple parallel activities must be performed. Therefore,...

0 IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on Reconfigurable Computing Systems (2008)

Ling Zhuo, Viktor K. Prasanna

The abundant hardware resources on current reconfigurable computing systems provide new opportunities for high-performance parallel implementations of scientific computations. In this paper, we study...

1 FPGA-based Cryptography for Internet Security ∗ (2008)

Viktor K. Prasanna, Andreas D

The enormous advances in network technology have resulted in an amazing potential for changing the way we communicate and do business over the Internet. However, for transmitting confidential data,...

An Estimation and Simulation Framework for Energy Efficient Design using Platform FPGAs (2008)

Sumit Mohanty, Jingzhao Ou, Viktor K. Prasanna

We discuss an estimation and simulation framework for energy efficient application design using platform FPGAs. This framework integrates various widely used simulators available for platform FPGAs,...

Adaptive Allocation of Independent Tasks to Maximize Throughput (2008)

Dynamic Data Layouts for Cache-Conscious Implementation of a Class of Signal Transforms (2008)

www.library.drexel.edu The following item is made available as a courtesy to scholars by the author(s) and Drexel University Library and may contain materials and content, including computer code and...

Neungsoo Park, Viktor K. Prasanna

Abstract—Effective utilization of cache memories is a key factor in achieving high performance for computing large signal transforms. Nonunit stride access in the computation of large signal...

An Estimation and Simulation Framework for Energy Efficient Design using Platform FPGAs (2008)

Sumit Mohanty, Jingzhao Ou, Viktor K. Prasanna

We discuss an estimation and simulation framework for energy efficient application design using platform FPGAs. This framework integrates various widely used simulators available for platform FPGAs,...

Parallel Exact Inference (2008)

Yinglong Xia, Viktor K. Prasanna

In this paper, we present complete message-passing implementation that shows scalable performance while performing exact inference on arbitrary Bayesian networks. Our work is based on a parallel...

High-Performance Reduction Circuits Using Deeply Pipelined Operators on FPGAs (2008)

Ling Zhuo, Gerald R. Morris, Viktor K. Prasanna

Field programmable gate arrays (FPGAs) have become an attractive option for accelerating scientific applications. Many scientific operations such as matrix-vector multiplication and dot product...

9 th International Workshop on Field Programmable Logic and Applications, August 1999. Genetic Programming using (2008)

Self-reconfigurable Fpgas, Ro Mei, Viktor K. Prasanna

Abstract. This paper presents a novel approach that utilizes FPGA self-reconfiguration for efficient computation in the context of Genetic Programming (GP). GP involves evolving programs represented...

A Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms ⋆ (2008)

ABSTRACT High-throughput Linked-Pattern Matching for Intrusion Detection Systems (2008)

Abstract. A recent trend towards integrating FPGAs with many heterogeneous components, such as memory systems, dedicated multipliers, etc., has made them an attractive option for implementing many...

10th International Workshop on Field Programmable Logic and Applications, August 2000. A Self-Reconfigurable Gate Array Architecture (2008)

This paper presents a hardware architecture for highly efficient intrusion detection systems. In addition, a software tool for automatically generating the hardware is presented. Intrusion detection...

Reetinder Sidhu, Sameer Wadhwa, Ro Mei, Viktor K. Prasanna

Abstract. This paper presents an innovative architecture for a reconfigurable device that allows single cycle context switching and single cycle random access to the unified on-chip...

Run-time Mapping of Graph-Problem Instances onto Recon gurable Hardware (Summary) (2008)

Andreas D, Viktor K. Prasanna, Jean-luc Gaudiot

During the past few years, the rapid advances in fabrication technology has led to the development of programmable devices (e.g., FPGAs) with substantial computational power. As a result, recon...

SIMULATION OF ADAPTIVE APPLICATIONS IN HETEROGENEOUS COMPUTING ENVIRONMENTS (2008)

End-to-end Toolkit for Developing a Class of WSN Applications on Sun SPOT Nodes ∗ (2008)

Designing adaptive applications for dynamic heterogeneous computing environments has received a lot of attention recently. In this paper, we propose a modular and extensible simulator that can be...

Animesh Pathak, Qunzhi Zhou, Luca Mottola, Amol Bakshi, Viktor K. Prasanna, Gian Pietro Picco

Over the past years of research in Wireless Sensor Networks (WSNs), both the hardware used to construct WSNs and the languages used to describe their functionality have evolved. The Sun Small...

General Terms (2008)

Seonil Choi, Ronald Scrofano, Viktor K. Prasanna

In this paper, we present techniques for energy-efficient design at the algorithm level using FPGAs. We then use these techniques to create energy-efficient designs for two signal processing kernel...

Design Space Exploration Using Arithmetic-Level Hardware–Software Cosimulation for Configurable Multiprocessor Platforms (2008)

Jingzhao Ou, Xilinx Inc, Viktor K. Prasanna

Configurable multiprocessor platforms consist of multiple soft processors configured on FPGA devices. They have become an attractive choice for implementing many computing applications. In addition...

Appears in the Proceedings of the 11 ¢ ¡ InternationalConference on Parallel and DistributedComputingSystems (PDCS 1998)1 Block-Cyclic Redistribution over Heterogeneous Networks (2008)

Prashanth B. Bhat, Viktor K. Prasanna, C. S. Raghavendra

Clusters of workstations and networked parallel computing systems are emerging as promising computational platforms for HPC applications. The processors in such systems are typically interconnected...

Configuration Compression for FPGA-based Embedded Systems 1 (2008)

Loop Pipelining and Optimization for Run Time Recon guration? (2008)

Field Programmable Gate Arrays (FPGAs) are a promising technology for developing high-performance embedded systems. The density and performance of FPGAs have drastically improved over the past few...

Parallel Exact Inference (2008)

Abstract. Lack of automatic mapping techniques is a signi cant hurdle in obtaining high performance for general purpose computing on recongurable hardware. In this paper, we develop techniques for...

Yinglong Xia, Viktor K. Prasanna, C. Bischof, M. Bücker, P. Gibbon, G. R. Joubert, ...

Permission to make digital or hard copies of portions of this work for personal or classroom use is granted provided that the copies are not made or distributed for profit or commercial advantage and...

Introduction 1 Parallelizing Exact Inference in Bayesian Networks (2008)

Vasanth Krishna Namasivayam, Animesh Pathak, Viktor K. Prasanna

Domain Speci c Mapping for Solving Graph Problems on Recon gurable Devices? (2008)

Andreas D, Ro Mei, Viktor K. Prasanna

Abstract. Conventional mapping approaches to Recon gurable Computing (RC) utilize CAD tools to perform the technology mapping of a high-level design. In comparison with the execution time on the...

Efficient Hardware Data Mining with the Apriori Algorithm on FPGAs (2008)

Reetinder Sidhu, Sameer Wadhwa, Alessandro Mei, Viktor K. Prasanna

The Apriori algorithm is a popular correlation-based datamining kernel. However, it is a computationally expensive algorithm and the running times can stretch up to days for large databases, as...

1 (2007)

Abstract. This paper presents an innovative architecture for a reconfigurable device that allows single cycle context switching and single cycle random access to the unified on-chip...

Architectures that implement the Internet Protocol Security (2007)

Parallel Algorithms for Linear Approximation on Distributed Memory Machines (2007)

Yongwha Chung Viktor, Viktor K. Prasanna, Cho-li Wang

In this paper, we summarize our results in parallelizing the linear approximation step on current distributed memory machines. We first analyze the features of current distributed memory machines and...

Design of Application Software for Embeddable Signal Processing (2007)

Wenheng Liu, Viktor K. Prasanna

High Performance Computing (HPC) technology is being used to provide scalable and costeffective solutions to many Embedded Signal Processing (ESP) applications. Such applications are computationally...

Load Balancing Strategies for Symbolic Vision Computations (2007)

Yongwha Chung, Jongwook Woo, Ram Nevatia, Viktor K. Prasanna

Most intermediate and high-level vision algorithms manipulate symbolic features. A key operation in these vision algorithms is to search symbolic features satisfying certain geometric constraints....

Space-efficient Mapping of 2D-DCT onto Dynamically Configurable Coarse-Grained Architectures (2007)

Andreas Dandalis, Andreas D, Viktor K. Prasanna

. This paper shows an efficient design for 2D-DCT on dynamically configurable coarse-grained architectures. Such coarse-grained architectures can provide improved performance for computationally...

Parallel Algorithms for Linear Approximation on Distributed Memory Machines (2007)

Yongwha Chung, Viktor K. Prasanna, Cho-Li Wang

In this paper, we summarize our results in parallelizing the linear approximation step on current distributed memory machines. We first analyze the features of current distributed memory machines and...

International Parallel and Distributed Processing Symposium (IPDPS), May 2000. Dynamic Data Layouts for Cache-conscious Factorization of DFT (2007)

Neungsoo Park, Dongsoo Kang, Kiran Bondalapati, Viktor K. Prasanna

Effective utilization of cache memories is a key factor in achieving high performance in computing the Discrete Fourier Transform (DFT). Most optimizationtechniques for computing the DFT rely on...

Performance modeling and interpretive simulation of pim architectures and applictions (2007)

A HIERARCHICAL SIMULATION FRAMEWORKFOR APPLICATION DEVELOPMENT ON SYSTEM-ON-CHIP ARCHITECTURES (2007)

Abstract. Processing-in-Memory systems that combine processing power and system memory chips present unique algorithmic challenges in the search for optimal system efficiency. This paper presents a...

Vaibhav Mathur, Viktor K. Prasanna

We propose a hierarchical simulation methodology to assist application development on System-on-Chip architectures. Hierarchical simulation involves simulation of a SoC based system at different...

E cient Matrix Multiplication Using Cache Conscious Data Layouts (2007)

Neungsoo Park, Wenheng Liu Y, Viktor K. Prasanna, Cauligi Raghavendra

This paper demonstrates performance improvements for matrix multiplication and mesh generation for Finite Element Method (FEM) by optimizing the memory hierarchy of traditional processors. The theory...

Application Directed Explicit Management for Advanced Cache Architectures * (2007)

Xi Wang, Viktor K. Prasanna

Abstract: In this paper, we demonstrate the effectiveness of application directed explicit cache management. We define the generalized split temporal/spatial cache architecture as an abstraction of...

Matching using FPGAs (2007)

11th International Conference on Field Programmable Logic and Applications, August 2001. Run-time Performance Optimization of an FPGA-based Deduction Engine for SAT Solvers? (2007)

This paper presents an efficient method for finding matches to a given regular expression in given text using FPGAs. To match a regular expression of length n, a serial machine requires O(2) memory...

Andreas D, Viktor K. Prasanna, Bharani Thiruvengadam

Abstract. FPGAs are a promising technology for accelerating SAT solvers. Besides their high density, fine granularity, and massive parallelism, FPGAs provide the opportunity for run-time...

ABSTRACT Towards Automatic Synthesis of a Class of Application-Specific Sensor Networks ∗ (2007)

Amol Bakshi, Jingzhao Ou, Viktor K. Prasanna

Automatic synthesis of sensor network-based systems can be described as the process of translating a formal specification of application functionality into a particular task mapping, settings of...

and (2007)

Dongsoo Kang, Dongsoo Kang, Henry W. Park, Henry W. Park, Jinwoo Suh, Jinwoo Suh, ...

Views, opinions, and/or findings contained in this report are those of the author(s) and should not be construed as an official Department of Defense Position, policy, or decision unless so...

General Terms (2007)

A Comparative Study of Performance of AES Final Candidates Using FPGAs. Submission for The Third AES Candidate Conference (2007)

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Adaptive allocation of independent tasks to maximize throughput (2007)

In this paper we study and compare the performance of FPGA-based implementations of the ve-nal AES candidates (MARS, RC6, Rijndael, Serpent, and Two sh). FPGAs seem to match extremely well with the...

Hong, Bo, Prasanna, Viktor K.

In this paper, we consider the task allocation problem for computing a large set of equal-sized independent tasks on a heterogeneous computing system where the tasks initially reside on a single...

A compilation framework for macroprogramming networked sensors (2007)

Animesh Pathak, Luca Mottola, Amol Bakshi, Viktor K. Prasanna, Gian Pietro Picco

Abstract. Macroprogramming—the technique of specifying the behavior of the system, as opposed to the constituent nodes—provides application developers with high level abstractions that alleviate...

G.P.: Expressing sensor network interaction patterns using data-driven macroprogramming (2007)

Animesh Pathak, Luca Mottola, Viktor K. Prasanna, Gian Pietro Picco, Politecnico Di Milano

Wireless Sensor Networks (WSNs) are increasingly being employed as a key building block of pervasive computing infrastructures, owing to their ability to be embedded within the real world. So far,...

A compilation framework for macroprogramming networked sensors (2007)

Animesh Pathak, Luca Mottola, Amol Bakshi, Viktor K. Prasanna, Gian Pietro Picco

Abstract. Macroprogramming—the technique of specifying the behavior of the system, as opposed to the constituent nodes—provides application developers with high level abstractions that alleviate...

Sparse matrix computations on reconfigurable hardware (2007)

Gerald R. Morris, Us Army, Viktor K. Prasanna

Using a high-level-language to hardware-description-language compiler and some novel architectures and algorithms to map two well-known double-precision floating-point sparse matrix...

G.P.: Expressing sensor network interaction patterns using data-driven macroprogramming (2007)

Animesh Pathak, Luca Mottola, Viktor K. Prasanna, Gian Pietro Picco, Politecnico Di Milano

Wireless Sensor Networks (WSNs) are increasingly being employed as a key building block of pervasive computing infrastructures, owing to their ability to be embedded within the real world. So far,...

G.P.: Expressing sensor network interaction patterns using data-driven macroprogramming (2007)

Animesh Pathak, Luca Mottola, Amol Bakshi, Viktor K. Prasanna, Gian Pietro Picco, Politecnico Di Milano

Wireless Sensor Networks (WSNs) are increasingly being employed as a key building block of pervasive computing infrastructures, owing to their ability to be embedded within the real world. So far,...

V.K.: Enabling scope-based interactions in sensor network macroprogramming (2007)

Luca Mottola, Animesh Pathak, Amol Bakshi, Viktor K. Prasanna, Gian Pietro Picco

Wireless sensor networks are increasingly employed to develop sophisticated applications where heterogeneous nodes are deployed, and multiple parallel activities must be performed. Therefore,...

Rapid Energy Estimation for Hardware-Software Codesign Using FPGAs (2006)

A hybrid approach for mapping conjugate gradient onto an FPGA-augmented reconfigurable supercomputer (2006)

By allowing parts of the applications to be executed either on soft processors (as software programs) or on customized hardware peripherals attached to the processors, FPGAs have made traditional...

Gerald R. Morris, Viktor K. Prasanna

Supercomputer companies such as Cray, Silicon Graphics, and SRC Computers now offer reconfigurable computer (RC) systems that combine general-purpose processors (GPPs) with field-programmable gate...

Prasanna, “Performance of FPGA Implementation of Bit-split Architecture for Intrusion Detection Systems (2006)

Hong-jip Jung, Zachary K. Baker, Viktor K. Prasanna

The use of reconfigurable hardware for network security applications has recently made great strides as Field-Programmable Gate Array (FPGA) devices have provided larger and faster resources. The...

An architecture for efficient hardware data mining using reconfigurable computing systems (2006)

Regular Expression Software Deceleration For Intrusion Detection Systems (2006)

The Apriori algorithm is a fundamental correlation-based data mining kernel used in a variety of fields. The innovation in this paper is a highly parallel custom architecture implemented on a...

Zachary K. Baker, Hong-jip Jung, Viktor K. Prasanna

The use of reconfigurable hardware for network security applications has recently made great strides as FPGA devices have provided larger and faster resources. Regular expressions have become a...

A hardware/software approach to molecular dynamics on reconfigurable computers (2006)

Ronald Scrofano, Maya Gokhale, Frans Trouw, Viktor K. Prasanna

With advances in reconfigurable hardware, especially field-programmable gate arrays (FPGAs), it has become possible to use reconfigurable hardware to accelerate complex applications, such as those in...

DOI 10.1155/ES/2006/98045 Rapid Energy Estimation for Hardware-Software Codesign Using FPGAs (2006)

Scalable parallel implementation of Bayesian network to junction tree conversion for exact inference (2006)

By allowing parts of the applications to be executed either on soft processors (as software programs) or on customized hardware peripherals attached to the processors, FPGAs have made traditional...

Vasanth Krishna Namasivayam, Animesh Pathak, Viktor K. Prasanna

We present a scalable parallel implementation for converting a Bayesian network to a junction tree, which can then be used for a complete parallel implementation for exact inference. We explore...

Energy Minimization for Real-Time Data Gathering in Wireless Sensor Networks (2006)

Yang Yu, Viktor K. Prasanna, Bhaskar Krishnamachari

Abstract — This paper studies the challenging problem of energy minimization for data gathering over a multiple-sources single-sink communication substrate in wireless sensor networks by exploring...

Energy Minimization for Real-Time Data Gathering in Wireless Sensor Networks (2006)

Yang Yu, Viktor K. Prasanna, Bhaskar Krishnamachari

Abstract — This paper studies the challenging problem of energy minimization for data gathering over a multiple-sources single-sink communication substrate in wireless sensor networks by exploring...

Search-Optimized Suffix-Tree Storage for Biological Applications (2006)

Bedathur, Srikanta, Haritsa, Jayant, Bader, David A., Parashar, Manish, Varadarajan, Sridhar, Prasanna, Viktor K.

Suffix-trees are popular indexing structures for various sequence processing problems in biological data management. We investigate here the possibility of enhancing the search efficiency of...

Rapid Energy Estimation for Hardware-Software Codesign Using FPGAs (2006)

Energy-balanced task allocation for collaborative processing in wireless sensor networks (2005)

By allowing parts of the applications to be executed either on soft processors (as software programs) or on customized hardware peripherals attached to the processors, FPGAs have made traditional...

Energy-balanced task allocation for collaborative processing in wireless sensor networks (2005)

We propose an energy-balanced allocation of a real-time application onto a single-hop cluster of homogeneous sensor nodes connected with multiple wireless channels. An epoch-based application...

The Abstract Task Graph: a Methodology for Architecture-Independent Programming of Networked Sensor Systems (2005)

We propose an energy-balanced allocation of a real-time application onto a single-hop cluster of homogeneous sensor nodes connected with multiple wireless channels. An epoch-based application...

Amol Bakshi, Viktor K. Prasanna

The Abstract Task Graph (ATaG) is a data driven programming model for end-to-end application development on networked sensor systems. An ATaG program is a system-level, architecture-independent...

The Abstract Task Graph: a Methodology for Architecture-Independent Programming of Networked Sensor Systems (2005)

Amol Bakshi, Viktor K. Prasanna

The Abstract Task Graph (ATaG) is a data driven programming model for end-to-end application development on networked sensor systems. An ATaG program is a system-level, architecture-independent...

Energy- and time-efficient matrix multiplication on FPGAs (2005)

Ju-wook Jang, Seonil B. Choi, Viktor K. Prasanna

Abstract—We develop new algorithms and architectures for matrix multiplication on configurable devices. These have reduced energy dissipation and latency compared with the state-of-the-art...

Sparse matrix-vector multiplication on FPGAs (2005)

Ling Zhuo, Viktor K. Prasanna

Sparse matrix-vector multiplication (SpMXV) is a key computational kernel widely used in scientific applications and signal processing applications. However, the performance of SpMXV on most modern...

Exploring Energy-Latency Tradeoffs for Data Gathering in Wireless Sensor Networks (2005)

Yang Yu, Viktor K. Prasanna, Bhaskar Krishnamachari

We study the problem of scheduling packet transmissions for data gathering in wireless sensor networks.

Efficient Parallel Data Mining with the Apriori Algorithm on FPGAs (2005)

A Computationally-efficient Engine for Flexible Intrusion Detection (2005)

The Apriori algorithm is a popular and foundational member of the correlationbased datamining kernels used today. However, it is a computationally expensive algorithm and running times can stretch to...

A library of parameterizable floating-point cores for FPGAs and their application to scientific computing (2005)

Pattern matching for network security and intrusion detection demands exceptionally high performance. This paper describes a novel systolic array-based string matching architecture using a bu#ered,...

Gokul Govindu, Ronald Scrofano, Viktor K. Prasanna

Abstract — Advances in field programmable gate arrays (FP-GAs), which are the platform of choice for reconfigurable computing, have made it possible to use FPGAs in increasingly many areas of...

Communication models for algorithm design in wireless sensor networks (2005)

Yang Yu, Bo Hong, Viktor K. Prasanna

With continuing advancements in sensor node design and increasingly complex applications for wireless sensor networks (WSNs), formal communication models are needed for either fair comparison between...

Infrastructure-Establishment from Scratch in Wireless Sensor Networks (2005)

Funke, Stefan, Milosavljevic, Nikola, Prasanna, Viktor K., Iyengar, Sitharama, Spirakis, Paul, Welsh, Matt

Possible and must (2004)

Jingzhao Ou, Seonil Choi, Student Member, Student Member, Viktor K. Prasanna

Abstract — Reconfigurable System-on-Chip (RSoC) devices incorporate various components, such as processor core, reconfigurable logic, memory, etc., onto a single chip. They are being used to...

PyGen: A MATLAB/Simulink based tool for synthesizing parameterized and energy efficient designs using fpgas (2004)

Design of High-Performance Embedded System using Model Integrated Computing. ITEA 04006 Current limitations of best practices Deliverable ID (2004)

System level tools based on MATLAB/Simulink are becoming popular for designing applications using FPGAs. In these tools, application designers describe their designs at high level using the powerful...

A methodology for energy efficient application synthesis using platform fpgas (2004)

Model Integrated Computing (MIC) promotes the use of models as a “backbone ” of model-integrated system development. In this paper, we study the use of MIC to design a heterogeneous...

Rapid energy estimation of computations on FPGA based soft processors (2004)

Abstract — Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platform...

Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs (2004)

Abstract — FPGA based soft processors are an attractive option for implementing embedded applications. As energy efficiency has become a key performance metric, techniques that can quickly and...

Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs (2004)

Abstract. This paper presents a tool for automatic synthesis of highly efficient intrusion detection systems using a high-level, graph-based partitioning methodology, and tree-based lookahead...

Constrained Flow Optimization with Applications to Data Gathering (2004)

Abstract. This paper presents a tool for automatic synthesis of highly efficient intrusion detection systems using a high-level, graph-based partitioning methodology, and tree-based lookahead...

Automated Incremental Design of Flexible Intrusion Detection Systems on FPGAs (2004)

Abstract. We focus on data gathering problems in energy-constrained wireless sensor networks. We study store-and-gather problems where data are locally stored on the sensors before the data gathering...

Parameterized and Energy Efficient Adaptive Beamforming Using (2004)

Intrusion detection for network security is a computeintensive application demanding high system performance. This paper presents a variety of strategies we have developed for the automatic synthesis...

Design of High-Performance Embedded System using Model Integrated Computing. ITEA 04006 Current limitations of best practices Deliverable ID (2004)

Adaptive beamforming is widely used in many sonar and telecommunication systems. FPGAs are attractive for implementing these applications. In this paper, we develop parameterized designs and identify...

A Methodology for Synthesis of Efficient Intrusion Detection Systems on FPGAs (2004)

Model Integrated Computing (MIC) promotes the use of models as a “backbone ” for model-integrated system development. In this paper, we demonstrate the use of MIC to design a heterogeneous...

Optimizing System Life time for Data Gathering in Networked Sensor Systems (2004)

Intrusion detection for network security is a computation intensive application demanding high system performance. System level design, a relatively unexplored field in this area, allows more...

Issues in designing middleware for wireless sensor networks (2004)

We focus on data gathering problems in energyconstrained networked sensor systems. The system operates in rounds where a subset of the sensors generate a specified number of data packets during each...

Yang Yu, Bhaskar Krishnamachari, Viktor K. Prasanna

Abstract — Wireless sensor networks are being developed for a variety of applications. With the continuing advances in network and application design, appropriate middleware is needed to provide...

Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs (2004)

Automated Incremental Design of Flexible Intrusion Detection Systems on FPGAs (2004)

This paper presents a tool for automatic synthesis of highly e#cient intrusion detection systems using a high-level, graph-based partitioning methodology, and tree-based lookahead architectures....

Energy-latency tradeoffs for data gathering in wireless sensor networks (2004)

Intrusion detection for network security is a computeintensive application demanding high system performance. This paper presents a variety of strategies we have developed for the automatic synthesis...

Yang Yu, Bhaskar Krishnamachari, Viktor K. Prasanna

Abstract — We study the problem of scheduling packet transmissions for data gathering in wireless sensor networks. The focus is to explore the energy-latency tradeoffs in wireless communication...

Energy-latency tradeoffs for data gathering in wireless sensor networks (2004)

Yang Yu, Bhaskar Krishnamachari, Viktor K. Prasanna

Abstract — We study the problem of scheduling packet transmissions for data gathering in wireless sensor networks. The focus is to explore the energy-latency tradeoffs in wireless communication...

Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs (2004)

A Methodology for Synthesis of Efficient Intrusion Detection Systems on FPGAs (2004)

This paper presents a methodology and a tool for automatic synthesis of highly efficient intrusion detection systems using a high-level, graph-based partitioning methodology and tree-based lookahead...

Exploring Energy-Latency Tradeoffs for Real-Time Data Gathering in Wireless Sensor Networks (2004)

Intrusion detection for network security is a computation intensive application demanding high system performance. System level design, a relatively unexplored field in this area, allows more...

Yang Yu, Bhaskar Krishnamachari, Viktor K. Prasanna, Yang Yu, Bhaskar Krishnamachari, Viktor K. Prasanna

This paper studies the challenging problem of scheduling packet transmissions for data gathering in wireless sensor networks. The focus of our work is to explore the energy-latency tradeoffs in...

Energy-Latency Tradeoffs for Data Gathering in Wireless Sensor Networks (2004)

Yang Yu, Bhaskar Krishnamachari, Viktor K. Prasanna

This paper provides algorithmic solutions to the challenging problem of scheduling packet transmissions for data gathering in wireless sensor networks. The focus of our work is to explore the...

Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on FPGAs (2004)

Ling Zhuo, Viktor K. Prasanna

The abundant hardware resources on current FPGAs provide new opportunities to improve the performance of hardware implementations of scientific computations. In this paper, we propose two FPGA-based...

Time and Area Efficient Pattern Matching on FPGAs (2004)

A Hierarchical Approach for Energy Efficient Application Design Using Heterogeneous Embedded (2003)

Pattern matching for network security and intrusion detection demands exceptionally high performance. Much work has been done in this field, and yet there is still significant room for improvement in...

Time and Energy Efficient Matrix Factorization using FPGAs (2003)

Several features such as reconfiguration, voltage and frequency scaling, low-power operating states, duty-cycling, etc. are exploited for latency and energy efficient application design using...

Seonil Choi, Viktor K. Prasanna

Abstract. In this paper, new algorithms and architectures for matrix factorization are presented. Two fully-parallel and block-based designs for LU decomposition on configurable devices are proposed....

Tiling, block data layout, and memory hierarchy performance (2003)

Neungsoo Park, Bo Hong, Viktor K. Prasanna

Abstract—Recently, several experimental studies have been conducted on block data layout in conjunction with tiling as a data transformation technique to improve cache performance. In this paper,...

Raghavendra, “Collaborative and distributed computation in mesh-like sensor arrays (2003)

Mitali Singh, Viktor K. Prasanna, Jose Rolim, Cauligi S. Raghavendra

Abstract. Sensor networks are being used for implementation of a large number of applications involving distributed and collaborative computation. Extensive research has focused upon design of time...

Energy-efficient and parameterized designs for fast Fourier transform on FPGA (2003)

Seonil Choi, Gokul Govindu, Ju-wook Jang, Viktor K. Prasanna

In this paper, we develop energy efficient designs for the Fast Fourier Transform (FFT) on FPGAs. Architectures for FFT on FPGAs are designed by investigating and applying techniques for minimizing...

Energy-Efficient Multi-Hop Packet Transmission Using Modulation Scaling in Wireless Sensor Networks (2003)

Issues in Designing Middleware for Wireless Sensor Networks (2003)

Wireless sensor networks are being developed for a variety of applications. Energy conservation for communication operations in such networks is crucial and challenging. This paper studies the...

Yang Yu, Bhaskar Krishnamachari, Viktor K. Prasanna

Wireless sensor networks are being developed for a variety of applications. With the continuing advances in network and application design, appropriate middleware is needed to provide both...

Performance Modeling of Reconfigurable SoC Architectures and Energy-Efficient Mapping of a Class of Applications (2003)

Jingzhao Ou, Seonil Choi, Viktor K. Prasanna

Reconfigurable System-on-Chip (RSoC) devices are being used to implement many battery operated systems, where energy efficiency is a major concern. RSoCs incorporate many different components, such...

distributed algorithm for waking-up in heterogeneous sensor networks (2003)

Akis Spyropoulos, Cauligi S. Raghavendra, Viktor K. Prasanna

Abstract. In this paper we present a distributed, application-morphable, algorithm for waking up appropriate sensor nodes in a heterogeneous sensor network. We assume a sensor field consisting of a...

Optimizing Graph Algorithms for Improved Cache Performance (2002)

Joon-sang Park, Michael Penner, Viktor K. Prasanna

In this paper, we develop algorithmic optimizations to improve the cache performance of four fundamental graph algorithms. We present a cache-oblivious implementation of the Floyd-Warshall Algorithm...

System-Level Energy Tradeoffs for Collaborative Computation (2002)

Mitali Singh, Viktor K. Prasanna

Abstract: Energy is a critical performance metric in collaborative and distributed wireless networks. An integrated approach that considers system-level energy tradeoffs (such as communication versus...

Optimizing Graph Algorithms for Improved Cache Performance (2002)

Joon-sang Park, Michael Penner, Viktor K Prasanna

Tiling has long been used to improve cache performance. Recursion has recently been used as a cache-oblivious method of improving cache performance. Both of these techniques are normally applied to...

Rapid system-level performance evaluation and optimization for application mapping onto SoC architectures (2002)

Reconfigurable computing systems (2002)

Abstract--System-on-Chip (SoC) architectures inte-grate several heterogeneous components onto a single chip. These components provide various capabilities such as dynamic voltage scaling,...

A Modular and Extensible Simulator for Performance Evaluation of Adaptive Applications in Heterogeneous Computing Environments (2002)

Reconfigurable computing is emerging as the new paradigm for satisfying the simultaneous demand for application performance and flexibility. The ability to customize the architecture to match the...

Energy-Efficient Matrix Multiplication on FPGAs (2002)

In this paper, we propose a modular and extensible simulator that can be used to evaluate the performance of applications in a dynamic heterogeneous environment. Our simulator has built-in support...

Ju-wook Jang, Seonil Choi, Viktor K. Prasanna

Abstract. We develop new algorithms and architectures for matrix multiplication on configurable devices. These designs significantly reduce the energy dissipation and latency compared with the...

Efficient metacomputation using self-reconfiguration (2002)

Analysis of memory hierarchy performance of block data layout (2002)

Abstract. Self-reconfiguration is a technique using which configured logic can quickly modify itself at runtime to suit application requirements. Although performance improvements using...

Neungsoo Park, Bo Hong, Viktor K. Prasanna

Recently, several experimental studies have been conducted on block data layout as a data transformation technique used in conjunction with tiling to improve cache performance. In this paper, we...

Domain-Specific Modeling for Rapid System-Wide Energy Estimation of Reconfigurable Architectures (2002)

Seonil Choi, Sumit Mohanty, Viktor K. Prasanna

Abstract – Reconfigurable architectures such as FPGAs are flexible alternatives to DSPs or ASICs used in mobile devices for which energy is a key performance metric. Reconfigurable architectures...

Optimizing Graph Algorithms for Improved Cache Performance (2002)

Joon-sang Park, Michael Penner, Viktor K Prasanna

Tiling has long been used to improve cache performance. Recursion has recently been used as a cache-oblivious method of improving cache performance. Both of these techniques are normally applied to...

Efficient metacomputation using self-reconfiguration (2002)

– Internet • Performance metrics – Energy, Latency, and Area (2002)

Abstract. Self-reconfiguration is a technique using which configured logic can quickly modify itself at runtime to suit application requirements. Although performance improvements using...

Seonil Choi, Ronald Scrofano, Viktor K. Prasanna

– Embedded multipliers, processors • Military and commercial systems using FPGAs – Digital Signal Processing: matrix operations, FFT, window operations, filtering

An integer programming approach for static mapping of paths onto heterogeneous real-time systems", lo (2001)

Sethavidh Gertphol, Yang Yu, Ammar Alhusaini, Viktor K. Prasanna

In this paper, we study the problem of mapping a set of independent paths onto a heterogeneous real-time system. Each path is a pipeline of several stages where each stage consists of one...

Collective value of qos: A performance measure framework for distributed heterogeneous networks (2001)

Jong-kook Kim, Taylor Kidd, Howard Jay Siegel, Cynthia Irvine, Tim Levin, Debra A. Hensgen, ...

When users ’ tasks in a distributed heterogeneous computing environment are allocated resources, and the total demand placed on system resources by the tasks, for a given interval of time, exceeds...

Cache-Friendly Implementations of Transitive Closure (2001)

Michael Penner, Viktor K Prasanna

In this paper we show cache-friendly implementations of the Floyd-Warshall algorithm for the All-Pairs ShortestPath problem. We first compare the best commercial compiler optimizations available with...

Fast Regular Expression Matching using FPGAs (2001)

An Integer Programming Approach for Static Mapping of Paths onto (2001)

This paper presents an ecient method for nding matches to a given regular expression in given text using FPGAs. To match a regular expression of length n, a serial machine requires

Sethavidh Gertphol, Yang Yu, Ammar Alhusaini, Viktor K. Prasanna

of independent paths onto a heterogeneous real-time system. Each path is a pipeline of several stages where each stage consists of one application. Each path has latency and throughput requirements...

Cache Conscious Walsh-Hadamard Transform (2001)

Neungsoo Park And, Neungsoo Park, Viktor K. Prasanna

The Walsh-Hadamard Transform (WHT) is an important algorithm in signal processing because of its simplicity. However, in computing large size WHT, non-unit stride access results in poor cache...

An integer programming approach for static mapping of paths onto heterogeneous real-time systems", lo (2001)

Sethavidh Gertphol, Yang Yu, Ammar Alhusaini, Viktor K. Prasanna

In this paper, we study the problem of mapping a set of independent paths onto a heterogeneous real-time system. Each path is a pipeline of several stages where each stage consists of one...

Collective Value of QoS: A Performance Measure Framework for Distributed Heterogeneous Networks (2001)

Jong-kook Kim, Taylor Kidd, Howard Jay Siegel, Cynthia Irvine, Tim Levin, Debra A. Hensgen, ...

When users' tasks in a distributed heterogeneous computing environment are allocated resources, and the total demand placed on system resources by the tasks, for a given interval of time,...

Collective Value of QoS: A Performance Measure Framework for Distributed Heterogeneous Networks (2001)

Jong-kook Kim, Taylor Kidd, Howard Jay Siegel, Cynthia Irvine, Tim Levin, Debra A. Hensgen, ...

When users' tasks in a distributed heterogeneous computing environment are allocated resources, and the total demand placed on system resources by the tasks, for a given interval of time,...

A Comparative Study of Performance of AES Final Candidates Using FPGAs (2000)

Andreas Dandalis, Viktor K. Prasanna

Abstract. In this paper we study and compare the performance of FPGA-based implementations of the ve nal AES candidates (MARS, RC6, Rijndael, Serpent, and Twosh). Our goal is to evaluate the...

A QoS Performance Measure Framework for Distributed Heterogeneous Networks (2000)

Jong-kook Kim, Debra A. Hensgen, Taylor Kidd, Howard Jay Siegel, David St. John, Cynthia Irvine, ...

In a distributed heterogeneous computing environment, users' tasks are allocated resources to simultaneously satisfy, to varying degrees, the tasks' different, and possibly conflicting,...

Loop Pipelining and Optimization for Run Time Reconfiguration (2000)

Reconfigurable Computing: Architectures, Models and Algorithms (2000)

. Lack of automatic mapping techniques is a significant hurdle in obtaining high performance for general purpose computing on reconfigurable hardware. In this paper, we develop techniques for mapping...

Dynamic Data Layouts for Cache-conscious Factorization of DFT (2000)

The performance requirements of applications have continuously superseded the computing power of architecture platforms. Increasingly larger number of transistors available on a chip have resulted in...

Neungsoo Park, Dongsoo Kang, Kiran Bondalapati, Viktor K. Prasanna

Effective utilization of cache memories is a key factor in achieving high performance in computing the Discrete Fourier Transform (DFT). Most optimizationtechniques for computing the DFT rely on...

A QoS Performance Measure Framework (2000)

For Distributed Heterogeneous, Jong-kook Kim, Debra A. Hensgen, Taylor Kidd, Howard Jay Siegel, David St. John, ...

In a distributed heterogeneous computing environment, users' tasks are allocated resources to simultaneously satisfy, to varying degrees, the tasks' different, and possibly conflicting,...

Memory Latency: to Tolerate or to Reduce (2000)

Amol Bakshi, Jean-luc Gaudiot, Wen-yen Lin, Manil Makhija, Viktor K. Prasanna, Wonwoo Ro, ...

It has become a truism that the gap between processor speed and memory access latency is continuing to increase at a rapid rate. This paper presents some of the architecture strategies which are used...

Reconfigurable Computing: Architectures, Models and Algorithms (2000)

Efficient Collective Communication in Distributed Heterogeneous Systems (1999)

The performance requirements of applications have continuously superseded the computing power of architecture platforms. Increasingly larger number of transistors available on a chip have resulted in...

Prashanth B. Bhat, C. S. Raghavendra, Viktor K. Prasanna

The Information Power Grid (IPG) is emerging as an infrastructure that will enable distributed applications – such as video conferencing and distributed interactive simulation – to seamlessly...

DRIVE: An Interpretive Simulation and Visualization Environment for Dynamically Reconfigurable Systems (1999)

Efficient Collective Communication in Distributed Heterogeneous Systems (1999)

Current simulation tools for reconfigurable systems are based on low level simulation of application designs developed in a High-level Description Language(HDL) on HDL models of architectures. This...

Prashanth B. Bhat, C.S. Raghavendra, Viktor K. Prasanna

The Information Power Grid (IPG) is emerging as an infrastructure that will enable distributed applications -- such as video conferencing and distributed interactive simulation -- to seamlessly...

A Unified Resource Scheduling Framework for Heterogeneous Computing Environments (1999)

Ammar H. Alhusaini, Viktor K. Prasanna, C.S. Raghavendra

A major challenge in Metacomputing Systems (Computational Grids) is to effectively use their shared resources, such as compute cycles, memory, communication network, and data repositories, to...

Managing Dynamic Precision on Reconfigurable Hardware (1999)

Kiran Bondalapati, Viktor K. Prasanna, Petros Ioannou

this paper we outline our framework for managing the dynamic precision variation. We represent the variation in the required precision for an operation by using a precision variation curve. The...

DRIVE: An Interpretive Simulation and Visualization Environment for Dynamically Reconfigurable Systems (1999)

Hardware Object Selection for Mapping Loops onto Reconfigurable Architectures (1999)

. Current simulation tools for reconfigurable systems are based on low level simulation of application designs developed in a High-level Description Language(HDL) on HDL models of architectures. This...

Domain Specific Mapping for Solving Graph Problems on Reconfigurable Devices (1999)

Reconfigurable circuits and systems have evolved from application specific accelerators to a general purpose computing paradigm. Reconfiguring the logic is still an expensive operation and precludes...

Andreas Dandalis, Andreas D, Ro Mei, Viktor K. Prasanna

. Conventional mapping approaches to Reconfigurable Computing (RC) utilize CAD tools to perform the technology mapping of a high-level design. In comparison with the execution time on the hardware,...

Hardware Object Selection for Mapping Loops onto Reconfigurable Architectures (1999)

Dynamic Precision Management for Loop Computations on Reconfigurable Architectures (1999)

Reconfigurable circuits and systems have evolved from application specific accelerators to a general purpose computing paradigm. Reconfiguring the logic is still an expensive operation and precludes...

String Matching on Multicontext FPGAs using Self-Reconfiguration (1999)

Reconfigurable architectures promise significant performance benefits by customizing the configurations to suit the computations. Variable precision for computations is one important method of...

Alessandro Mei, Viktor K. Prasanna

FPGAs can perform better than ASICs if the logic mapped onto them is optimized for each problem instance. Unfortunately, this advantage is often canceled by the long time needed by CAD tools to...

Dynamic Precision Management for Loop Computations on Reconfigurable Architectures (1999)

A Unified Resource Scheduling Framework for Heterogeneous Computing Environments (1999)

Reconfigurable architectures promise significant performance benefits by customizing the configurations to suit the computations. Variable precision for computations is one important method of...

Ammar H. Alhusaini, Viktor K. Prasanna

A major challenge in Metacomputing Systems (Computational Grids) is to effectively use their shared resources, such as compute cycles, memory, communication network, and data repositories, to...

Scalable Data Parallel Algorithms and Implementations for Vision. (1998)

Nevatia, Ramakant, Prasanna, Viktor K.

Our research is about designing, analyzing and implementing scalable parallel solutions to problems in intermediate- and high-level vision. This is a difficult problem as computations are...

Architecutres, Models, Algorithms, and Software Tools for Configurable Computing (1998)

Prasanna, Viktor K.

The Models, Algorithms, and Architectures for Reconfigurable Computing (MAARC) project developed a sound framework for algorithmic configurable computing and for exploiting this technology for...

Algorithms for Data Intensive Applications on Intelligent and Smart Memories (1998)

Prasanna, Viktor K.

The objective of this project was to develop an algorithmic framework that enables effective and efficient mapping of data intensive applications onto Intelligent and Smart memory architectures, as...

An Integrated Design Environment to Evaluate Power/Performance Tradeoffs for Sensor Network Applications (1998)

Bakshi, Amol B., Ou, Jingzhao, Prasanna, Viktor K.

Networks of inexpensive, low-power sensing nodes that can monitor the environment, perform limited processing on the samples, and detect events of interest in a collaborative fashion are fast...

Area, and Power Performance Analysis of a Floating-Point Based Application on FPGAs (1998)

Govindu, Gokul, Zhuo, Ling, Choi, Seonil, Gundala, Padma, Prasanna, Viktor K.

Almost all signal processing algorithms are initially represented as double precision floating-point in languages such as Matlab. For hardware implementations, these algorithms have to be converted...

Automated Incremental Design of Flexible Intrusion Detection Systems on FPGAs (1998)

Baker, Zacahry Z., Prasanna, Viktor K.

Intrusion detection for network security is a computeintensive application demanding high system performance. This paper presents a variety of strategies we have developed for the automatic synthesis...

A Flexible Multi-Dimensional QoS Performance Measure Framework for Distributed Heterogeneous Systems (1998)

Kim, Jong-Kook, Hensgen, Debra A., Kidd, Taylor, Siegel, Howard J., St. John, David, Irvine, Cynthia, ...

When users' tasks in a distributed heterogeneous computing environment (e.g., cluster of heterogeneous computers) are allocated resources, the total demand placed on some system resources by the...

Distributed Signal Processing in Wireless Sensor Networks (1998)

Raghavendra, Cauligi S., Prasanna, Viktor K.

Sensor nodes forming a network and using wireless communications are highly useful in a variety of applications and scenarios. Such a wireless sensor network can be used to collect and process...

Model-Based Integrated Simulation (MILAN) (1998)

Prasanna, Viktor K., Raghavendra, Cauligi S., Ledeczi, Akos

The motivation for the Model-based Integrated Simulation (MILAN) project is to develop an extensible modeling, simulation, and design space exploration framework for the design of latency and energy...

Mapping Loops onto Reconfigurable Architectures (1998)

A Mapping Methodology for Designing Software Task Pipelines for Embedded Signal Processing (1998)

Reconfigurable circuits and systems have evolved from application specific accelerators to a general purpose computing paradigm. But the algorithmic techniques and software tools are also heavily...

Myungho Lee, Wenheng Liu, Viktor K. Prasanna

. In this paper, we present a methodology for mapping an Embedded Signal Processing (ESP) application onto HPC platforms such that the throughput performance is maximized. Previous approaches used a...

Parallelizing Image Feature Extraction on Coarse-grain Machines (1998)

Yongwha Chung, Viktor K. Prasanna

In this paper, we present a fast parallel algorithm for feature extraction on coarse-grain MIMD machines. By maintaining algorithmic threads at each node, our algorithm enhances processor utilization...

Block-Cyclic Redistribution over Heterogeneous Networks (1998)

Prashanth Bhat And, Prashanth B. Bhat, Viktor K. Prasanna, C. S. Raghavendra

Clusters of workstations and networked parallel computing systems are emerging as promising computational platforms for HPC applications. The processors in such systems are typically interconnected...

Synthesis of Area-Efficient and High-Throughput Rate Data Format Converters (1998)

Jongwoo Bae, Viktor K. Prasanna

We propose two design methodologies for synthesis of area-efficient Data Format Converters (DFCs) with high throughput rate. DFCs are grouped into various classes according to the specification of...

Portable Implementation of Real-Time Signal Processing Benchmarks on HPC Platforms (1998)

Jinwoo Suh And, Jinwoo Suh, Viktor K. Prasanna

. For the evaluation of HPC systems for real-time signal processing, real-time benchmarks have recently been proposed by the US DoD signal processing and HPC communities. For the implementation of...

Block-Cyclic Redistribution over Heterogeneous Networks (1998)

Prashanth B. Bhat, Viktor K. Prasanna, C.S. Raghavendra

Clusters of workstations and networked parallel computing systems are emerging as promising computational platforms for HPC applications. The processors in such systems are typically interconnected...

Mapping Homogeneous Computations onto Dynamically Configurable Coarse-Grained Architectures (1998)

Andreas Dandalis, Andreas D, Viktor K. Prasanna

this paper we show a methodology for deriving dynamic computation structures for 2 dimensioned homogeneous computations. Homogeneous computations lead to all PEs having the same functionality. The...

Mapping Loops onto Reconfigurable Architectures (1998)

Mapping Loops onto Reconfigurable Architectures (1998)

. Reconfigurable circuits and systems have evolved from application specific accelerators to a general purpose computing paradigm. But the algorithmic techniques and software tools are also heavily...

Seeking solutions in configurable computing (1997)

. Reconfigurable circuits and systems have evolved from application specific accelerators to a general purpose computing paradigm. But the algorithmic techniques and software tools are also heavily...

Mangione-Smith, William H., Hutchings, Brad, Andrews, David, DeHon, André, Ebeling, Carl, Hartenstein, Reiner, ...

Configurable computing offers the potential of producing powerful new computing systems. Will current research overcome the dearth of commercial applicability to make such systems a reality?...

Multidisciplinary Research on Advanced, High-Speed, Adaptive Signal Processing for Radar Sensors. (1997)

Reed, Irving, Nikias, Chrysostomos L., Prasanna, Viktor K.

This report addresses two major components of research for high speed, spacetime adaptive processing (STAP) for radar sensors, namely (1) the development of advanced algorithms for detection and...

Configurable Hardware for Symbolic Search Operations (1997)

Seonil Choi, Yongwha Chung, Viktor K. Prasanna

Most intermediate and high-level vision tasks manipulate symbolic data. A kernel operation in these vision tasks is to search symbolic data satisfying certain geometric constraints. Such operations...

High Throughput-Rate Parallel Algorithms for Space Time Adaptive Processing (1997)

Myungho Lee And, Myungho Lee, Viktor K. Prasanna

Space Time Adaptive Processing (STAP) techniques that are being developed for the next generation radar systems require very high computing power. In order to meet the real-time requirements in STAP...

Constant Time Algorithms for Computational Geometry on the Reconfigurable Mesh (1997)

Ju-wook Jang, Madhusudan Nigam, Viktor K. Prasanna, Sartaj Sahni

The reconfigurable mesh consists of an array of processors interconnected by a reconfigurable bus system. The bus system can be used to dynamically obtain various interconnection patterns among the...

An Optimal Multiplication Algorithm on Reconfigurable Mesh (1997)

Ju-wook Jang, Heonchul Park, Viktor K. Prasanna

An O(1) time algorithm to multiply two N-bit binary numbers using an N N bit-model of reconfigurable mesh is shown. It uses optimal mesh size and it improves previously known results for...

Parallel Object Recognition on an FPGA-based Configurable Computing Platform (1997)

Yongwha Chung, Seonil Choi, Viktor K. Prasanna

Object recognition involves identifying known objects in a given scene. It plays a key role in image understanding. Geometric hashing has been proposed as a technique for model-based object...

Computation Models for Reconfigurable Machines (1997)

Kiran Bondalapati, Seonil Choi, Viktor K. Prasanna, Viktor K. Prasanna

: Currently, reconfigurable computing solutions are developed by writing High level Description Language (HDL) code and compiling it onto hardware. Though this approach is suitable for static...

Reconfigurable Meshes: Theory and Practice (1997)

Parallel Implementation Of Synthetic Aperture Radar On High Performance Computing Platforms (1997)

Configurable computing has recently gained much attention with the promise of delivering an order of magnitude performance improvement over general purpose processors. In this paper we contrast the...

Jinwoo Suh, Monte Ung, Viktor K. Prasanna

this paper, we show high throughput implementation of SAR on High Performance Computing (HPC) platforms. In our implementation, the processors are divided into two groups of size M and N . The first...

Fast Parallel Implementation of DFT Using Configurable Devices (1997)

Andreas Dandalis, Andreas D, Viktor K. Prasanna

. In this paper we propose a fast parallel implementation of Discrete Fourier Transform (DFT) using FPGAs. Our design is based on the Arithmetic Fourier Transform (AFT) using zero-order...

Reconfigurable Meshes: Theory and Practice 1 (1997)

Portable and scalable algorithms for irregular all-to-all communication (1996)

Configurable computing has recently gained much attention with the promise of delivering an order of magnitude performance improvement over general purpose processors. In this paper we contrast the...

Wenheng Liu, Cho-li Wang, Viktor K. Prasanna

In irregular all-to-all communication, messages are exchanged between every pair of processors. The message sizes vary from processor to processor and are known only at run time. This is a...

Portable and Scalable Algorithms for Irregular All-to-All Communication (1996)

Wenheng Liu, Cho-Li Wang, Viktor K. Prasanna

In this paper, we develop portable and scalable algorithms for performing irregular all-to-all communication in High Performance Computing (HPC) systems. To minimize the communication latency, the...

Communication Issues in Heterogeneous Embedded Systems (1996)

Wenheng Liu, William J. Kostis, Viktor K. Prasanna

The recent accelerated development of scalable computing systems has made possible the coordinated use of a suite of High Performance Computing (HPC) components for computationally demanding problems...

Communication Issues in Heterogeneous Embedded Systems (1996)

Wenheng Liu William, William J. Kostis, Viktor K. Prasanna

The recent accelerated development of scalable computing systems has made possible the coordinated use of a suite of High Performance Computing (HPC) components for computationally demanding problems...

Efficient Algorithms for Block-Cyclic Redistribution of Arrays (1996)

Young Won Lim, Prashanth B. Bhat, Viktor K. Prasanna

The block-cyclic data distribution is commonly used to organize array elements over the processors of a coarse-grained distributed memory parallel computer. In many scientific applications, the data...

A Fast Asynchronous Algorithm for Linear Feature Extraction on IBM SP-2 (1995)

Yongwha Chung Viktor, Viktor K. Prasanna, Cho-li Wang

In this paper, we present a fast parallel implementation of linear feature extraction on IBM SP-2. We first analyze the machine features and the problem characteristics to understand the overheads in...

Issues in using Heterogeneous HPC Systems for Embedded Real Time Signal Processing Applications (1995)

Prashanth Bhat Young, Young W. Lim, Viktor K. Prasanna

Embedded signal processing systems have traditionally been built using custom VLSI to meet real-time requirements. This leads to limited programmability and restricted flexibility. With recent...

Parallelization of Perceptual Grouping on Distributed Memory Machines (1995)

Cho-li Wang, Viktor K. Prasanna, Young Won Lim

In this paper, we propose architecture-independent parallel algorithms for solving Perceptual Grouping tasks on distributed memory machines. Given an n \Theta n image, using P processors, we show...

Issues in using Heterogeneous HPC Systems for Embedded Real Time Signal Processing Applications (1995)

Prashanth B. Bhat, Young W. Lim, Viktor K. Prasanna

Embedded signal processing systems have traditionally been built using custom VLSI to meet real-time requirements. This leads to limited programmability and restricted flexibility. With recent...

Parallelization of Perceptual Grouping on Distributed Memory Machines (1995)

Cho-Li Wang, Viktor K. Prasanna, Young Won Lim

In this paper, we propose architecture-independent parallel algorithms for solving Perceptual Grouping tasks on distributed memory machines. Given an n \Theta n image, using P processors, we show...

A Fast Asynchronous Algorithm for Linear Feature Extraction on IBM SP-2 (1995)

Yongwha Chung, Viktor K. Prasanna, Cho-Li Wang

In this paper, we present a fast parallel implementation of linear feature extraction on IBM SP-2. We first analyze the machine features and the problem characteristics to understand the overheads in...

Image feature extraction on connection machine CM-5 (1994)

Viktor K. Prasanna, Cho-li Wang

In this paper, we present a parallel implementation of an image feature extraction task on Connection Machine CM-5. We show that, given a 2048 \Theta 2048 grey level image as input, the extraction of...

Scalable Parallel Implementations of Perceptual Grouping on Connection Machine CM-5 (1994)

Viktor K. Prasanna, Cho-Li Wang

Perceptual grouping is a key step in vision to organize image data into structural hypotheses to be used for high level analysis. In this paper, we propose data allocation and load balancing...

Parallel Implementations of Perceptual Grouping Tasks on Distributed Memory Machines (1994)

Cho-li Wang, Viktor K. Prasanna, Yongwha Chung

In this paper, we propose parallel implementations for solving Perceptual Grouping tasks on distributed memory machines. Our implementations show that, given 7K line segments extracted from a 1K...

Scalable Data Parallel Object Recognition using Geometric Hashing on CM-5 (1994)

Viktor Prasanna And, Viktor K. Prasanna, Cho-li Wang

In this paper, we present scalable parallel algorithms for object recognition using geometric hashing. We define an abstract model of CM-5. We develop a loadbalancing technique that results in...

Parallel Implementations of Perceptual Grouping Tasks on Distributed Memory Machines (1994)

Cho-Li Wang, Viktor K. Prasanna, Yongwha Chung

In this paper, we propose parallel implementations for solving Perceptual Grouping tasks on distributed memory machines. Our implementations show that, given 7K line segments extracted from a 1K...

Scalable Data Parallel Implementations of Object Recognition using Geometric Hashing (1994)

Cho-Li Wang, Viktor K. Prasanna, Hyoung J. Kim, Ashfaq A. Khokhar

Object recognition involves identifying known objects in a given scene. It plays a key role in image understanding. Geometric hashing has been proposed as a technique for model-based object...

Scalable Data Parallel Object Recognition using Geometric Hashing on CM-5 (1994)

Viktor K. Prasanna, Cho-Li Wang

In this paper, we present scalable parallel algorithms for object recognition using geometric hashing. We define an abstract model of CM-5. We develop a loadbalancing technique that results in...

Heterogeneous computing: Challenges and opportunities (1993)

Ashfaq A. Khokhar, Viktor K. Prasanna, Muhammad E. Shaaban, Cho-li Wang

Anytime you work with oranges and apples, you'll need a number of schemes to organize total performance. This article surveys the challenges posed by heterogeneous computing and discusses some...

Low Level Vision Processing on Connection Machine CM-5 (1993)

Viktor Prasanna Ashfaq, Viktor K. Prasanna, Ashfaq A. Khokhar, Cho-li Wang

In this paper, we study low level vision processing on Connection Machine CM-5. A parallel computing model to capture the architectural features of CM-5 is identified. In this model, given an n by n...

Parallel Computation of 2-D Wavelet Transforms (1992)

Manavendra Misra, Viktor K. Prasanna

Both from a mathematical as well as a biological perspective, Wavelet transforms present themselves as an attractive means for extracting low-level information from an image. We present a...

Efficient VLSI Implementation of Iterative Solutions to Sparse Linear Systems (1989)

Manavendra Misra, David Nassimi, Viktor K. Prasanna

We propose a novel way of solving systems of linear equations with sparse coefficient matrices using iterative methods on a VLSI array. The nonzero entries of the coefficient matrix are mapped onto a...

enes, On a problem of L (1962)