Wolfram Hardt

Overview The Re-Configurable Delay-Insensitive FLYSIG 1 Architecture 2 (2009)

Wolfram Hardt, Achim Rettberg, Bernd Kleinjohann

Abstract: This article describes a new re-configurable architecture design suitable for high performance signal processing applications. The main benefits beside re-configurability are high...

Bibliographic information … (2008)

Wissenschaftliche Schriftenreihe, Fraunhofer Iis, Herzlichen Dank, Prof Dr, Wolfram Hardt, Den Herausgeber, ...

Vorwort Die jedes Frühjahr stattfindende »Dresdner Arbeitstagung Schaltungs- und Systementwurf « wird traditionell vom Fraunhofer-Institut für Integrierte Schaltungen, Institutsteil...

C-LAB: Cooperative Computing & Communication Laboratory, (2007)

Heinz Nixdorf, Wolfram Hardt, Siemens Nixdorf, Informationssysteme Ag

State Machine Models Giuseppe Del Castillo Heinz Nixdorf Institut Department of Mathematics & Computer Science University of Paderborn Furstenallee 11, 33102 Paderborn, Germany Wolfram Hardt...

Abstract In (2007)

Wolfram Hardt, M. Visarius, B. Kleinjohann

this paper we present a customized approach to performance and area optimization of asynchronous functional blocks. First an abstract model of the block architecture is introduced and an analytical...

Using the HDL-Advisor TM for Shortening the System Design Loop (2007)

Wolfram Hardt, Joachim Gerlach, Heinz-josef Eikerling, Wolfgang Rosenstiel, Brent Gregory

Abstract: In this paper, the integration of RT-level advice into the system-level synthesis methodology is examined. The synthesis procedure starts from a system-level specification given by standard...

Integration of HDL-based RT-Level Advice into System-Level Synthesis (2007)

Wolfram Hardt, Joachim Gerlach, Heinz-josef Eikerling, Wolfgang Rosenstiel, Brent Gregory

Abstract: In this paper, the integration of RT-level advice into the system-level synthesis methodology is examined. The synthesis procedure starts from a system-level specification given by standard...

FLYSIG 1: Towards High Performance Special Purpose Architectures by Joining Paradigms (2007)

Wolfram Hardt, Bernd Kleinjohann

Abstract: This paper describes a new design methodology for high performance special purpose architectures. The main benefits beside performance are robustness against technology changes and short...

Format (2007)

Eine Entwurfsdarstellung Fur, Andreas Hoffmann, Heinz-josef Eikerling, Wolfram Hardt, Reiner Genevriere, Raul Camposano, ...

Abstract. In diesem Papier werden die grundlegenden Ideen und Konzepte eines Syntheseformates prasentiert. Hauptziel des diskutierten Syntheseformates ist es, eine einheitliche Reprasentation eines...

C-LAB: Cooperative Computing & Communication Laboratory, (2007)

Heinz Nixdorf, Wolfram Hardt, Siemens Nixdorf, Informationssysteme Ag

High level design decisions as HW/SW-partitioning and instrumenting of building blocks can be supported efficiently by detailed analysis of dynamic instruction usage. In many cases the instruction...

Kompatibilitätsanalyse dynamischen Verhaltens von integrierten Automobil-Steuergeräten (2007)

Glockner, Matthias, Hardt, Wolfram, Fuchs, Maximilian, Macht, Michael

In Premium-Fahrzeugen werden derzeit ca. 60-70 Steuergeräte (SG) verbaut. Steuergeräte sind „eingebettete Systeme“ und stellen die zentralen Rechen- und Steuereinheiten für die elektrischen...

An XML Format Based Integration Infrastructure for IP Based Design (2003)

Markus Visarius, Johannes Lessmann, Wolfram Hardt, Frank Kelso, Wolfgang Thronicke

IP based design comprises two main steps. First, a suitable IP has to be found. Second, the IP has to undergo further processing before it can be included in existing designs. Since IP providers use...

Using Activation Intervals for Low Power Analysis (2000)

Achim Rettberg, Bernd Kleinjohann, Wolfram Hardt

This paper describes a new approach to integrate low power methods in a design on architectural level. Starting from an asynchronous architecture presented as a data-flow graph, an activation...

The Re-Configurable Delay-Insensitive FLYSIG Architecture (1999)

Wolfram Hardt, Achim Rettberg, Bernd Kleinjohann

Abstract: This article describes a new re-configurable architecture design suitable for high performance signal processing applications. The main benefits beside re-configurability are high...

Flysig: Dataflow Oriented Delay-Insensitive Processor for Rapid Prototyping of Signal Processing (1998)

Hardt, Wolfram, Kleinjohann, Bernd

As the one-chip integration of HW-modules designed by different companies becomes more and more popular reliability of a HW-design and evaluation of the timing behavior during the prototype stage are...

FLYSIG: dataflow oriented delay-insensitive processor for rapid prototyping of signal processing (1998)

Wolfram Hardt, Bernd Kleinjohann

Abstract: As the one-chip integration of HW-modules designed by different companies becomes more and more popular reliability of a HW-design and evaluation of the timing behavior during the prototype...

FLYSIG: dataflow oriented delay-insensitive processor for rapid prototyping of signal processing (1998)

Wolfram Hardt, Bernd Kleinjohann

Abstract: As the one-chip integration of HW-modules designed by different companies becomes more and more popular reliability of a HW-design and evaluation of the timing behavior during the prototype...

Pipelined Interface for HW/SW Codesign (1994)

Wolfram Hardt, Andreas Gnther, Raul Camposano

It has been pointed out that the efficiency of embedded systems is dramatically influenced by the interface between HW- and SW. Focussing on this part of codesign we developed a pipelined interface...